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From: Leonard Crestez <leonard.crestez@nxp.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
	"MyungJoo Ham" <myungjoo.ham@samsung.com>,
	"Kyungmin Park" <kyungmin.park@samsung.com>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Chanwoo Choi" <cw00.choi@samsung.com>,
	"Artur Świgoń" <a.swigon@partner.samsung.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Alexandre Bailon" <abailon@baylibre.com>,
	"Georgi Djakov" <georgi.djakov@linaro.org>,
	"Aisheng Dong" <aisheng.dong@nxp.com>,
	"Abel Vesa" <abel.vesa@nxp.com>, "Jacky Bai" <ping.bai@nxp.com>,
	"Anson Huang" <anson.huang@nxp.com>,
	"Fabio Estevam" <fabio.estevam@nxp.com>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Will Deacon" <will@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"open list:THERMAL" <linux-pm@vger.kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"Sascha Hauer" <kernel@pengutronix.de>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 2/7] dt-bindings: devfreq: Add bindings for generic imx buses
Date: Tue, 13 Aug 2019 01:32:36 +0000	[thread overview]
Message-ID: <VI1PR04MB702300C8C78BC033D16EDB85EED20@VI1PR04MB7023.eurprd04.prod.outlook.com> (raw)
In-Reply-To: CAL_JsqJWpQN2oTm8Q2_Gzd0GJ+YZoc9j-zh-U1s4eGhMxDEmEA@mail.gmail.com

On 8/12/2019 10:47 PM, Rob Herring wrote:
> On Mon, Aug 12, 2019 at 12:49 PM Leonard Crestez <leonard.crestez@nxp.com> wrote:

>> Add initial dt bindings for the interconnects inside i.MX chips.
>> Multiple external IPs are involved but SOC integration means the
>> software controllable interfaces are very similar.
>>
>> +description: |
>> +  The i.MX SoC family has multiple buses for which clock frequency (and sometimes
>> +  voltage) can be adjusted.
>> +
>> +  Some of those buses expose register areas mentioned in the memory maps as GPV
>> +  ("Global Programmers View") but not all. Access to this area might be denied for
>> +  normal world.
>> +
>> +  The buses are based on externally licensed IPs such as ARM NIC-301 and Arteris
>> +  FlexNOC but DT bindings are specific to the integration of these bus
>> +  interconnect IPs into imx SOCs.
> 
> No need to use the interconnect binding?

Separate RFC: https://patchwork.kernel.org/patch/11078673/

The interconnect is represented by a separate "virtual" node which might 
not be OK. There was also a recent RFC from samsung which turns devfreq 
nodes into interconnect providers:
     https://patchwork.kernel.org/cover/11054417/

Is that preferable?

>> +required:
>> +  - compatible
>> +  - clocks
> 
> reg?

This is deliberately optional: for some NICs the GPV register area is 
not exposed in the memory map. This is unusual but an accurate 
description of the hardware.

The current driver doesn't even attempt to map registers, it only 
adjusts the clock.

>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/imx8mm-clock.h>
>> +    noc: noc@32700000 {
>> +            compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc";
> 
> Doesn't match the schema. (Well, it does with 'contains', but
> fsl,imx8mm-noc is not documented.)

I'm confused about how per-SOC compatible strings works with validation. 
There is a rule that every SOC dtsi needs to add soc prefix to all 
device nodes but of_device_id in driver code doesn't need to be updated.

Without using "contains" on the "compatible" property then all 
SOC-specific compatible strings would need to be mentioned in every yaml 
files. Unless I'm missing something this means updating update every 
binding file for each new SOC?

I guess it can be useful because it also validates the compatible 
sequence itself.

For this current example something like this seems to work:

   compatible:
     oneOf:
       - items:
         - enum:
           - fsl,imx8mm-nic
           - fsl,imx8mq-nic
         - const: fsl,imx8m-nic
       - items:
         - enum:
           - fsl,imx8mm-noc
           - fsl,imx8mq-noc
         - const: fsl,imx8m-noc

--
Regards,
Leonard

  reply	other threads:[~2019-08-13  1:32 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12 18:49 [PATCH 0/7] PM / devfreq: Add initial imx support Leonard Crestez
2019-08-12 18:49 ` [PATCH 1/7] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram_alt/apb Leonard Crestez
2019-08-12 18:49 ` [PATCH 2/7] dt-bindings: devfreq: Add bindings for generic imx buses Leonard Crestez
2019-08-12 19:46   ` Rob Herring
2019-08-13  1:32     ` Leonard Crestez [this message]
2019-08-13 14:06       ` Rob Herring
2019-08-13 14:59         ` Leonard Crestez
2019-08-12 18:49 ` [PATCH 3/7] PM / devfreq: Add generic imx bus driver Leonard Crestez
2019-08-12 18:49 ` [PATCH 4/7] dt-bindings: devfreq: Add bindings for imx ddr controller Leonard Crestez
2019-08-12 19:51   ` Rob Herring
2019-08-12 18:49 ` [PATCH 5/7] PM / devfreq: Add dynamic scaling " Leonard Crestez
2019-08-12 18:49 ` [PATCH 6/7] PM / devfreq: imx-ddrc: Measure bandwidth with perf Leonard Crestez
2019-08-12 18:49 ` [PATCH 7/7] arm64: dts: imx8mm: Add devfreq nodes Leonard Crestez
     [not found] ` <CGME20190812185002epcas1p1c528b12d20771cf4887907fdfd716e22@epcms1p2>
2019-08-13  2:25   ` [PATCH 2/7] dt-bindings: devfreq: Add bindings for generic imx buses MyungJoo Ham
     [not found] ` <CGME20190812185005epcas3p10a9a3dbb90489534222e093c63f27900@epcms1p3>
2019-08-13  2:33   ` [PATCH 3/7] PM / devfreq: Add generic imx bus driver MyungJoo Ham
2019-08-13  3:02     ` Leonard Crestez

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