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* [PATCH v2 0/6] Introduce the for_each_set_clump macro
@ 2020-04-25 18:59 Syed Nayyar Waris
  2020-04-25 19:05 ` [PATCH v2 3/6] gpio: thermal: Utilize " Syed Nayyar Waris
  0 siblings, 1 reply; 4+ messages in thread
From: Syed Nayyar Waris @ 2020-04-25 18:59 UTC (permalink / raw)
  To: akpm
  Cc: andriy.shevchenko, vilhelm.gray, michal.simek, arnd, rrichter,
	linus.walleij, bgolaszewski, yamada.masahiro, rui.zhang,
	daniel.lezcano, amit.kucheria, linux-arch, linux-gpio,
	linux-kernel, linux-arm-kernel, linux-pm

This patchset introduces a new generic version of for_each_set_clump. 
The previous version of for_each_set_clump8 used a fixed size 8-bit
clump, but the new generic version can work with clump of any size but
less than or equal to BITS_PER_LONG. The patchset utilizes the new macro 
in several GPIO drivers.

The earlier 8-bit for_each_set_clump8 facilitated a
for-loop syntax that iterates over a memory region entire groups of set
bits at a time.

For example, suppose you would like to iterate over a 32-bit integer 8
bits at a time, skipping over 8-bit groups with no set bit, where
XXXXXXXX represents the current 8-bit group:

    Example:        10111110 00000000 11111111 00110011
    First loop:     10111110 00000000 11111111 XXXXXXXX
    Second loop:    10111110 00000000 XXXXXXXX 00110011
    Third loop:     XXXXXXXX 00000000 11111111 00110011

Each iteration of the loop returns the next 8-bit group that has at
least one set bit.

But with the new for_each_set_clump the clump size can be different from 8 bits.
Moreover, the clump can be split at word boundary in situations where word 
size is not multiple of clump size. Following are examples showing the working 
of new macro for clump sizes of 24 bits and 6 bits.

Example 1:
clump size: 24 bits, Number of clumps (or ports): 10
bitmap stores the bit information from where successive clumps are retrieved.

     /* bitmap memory region */
        0x00aa0000ff000000;  /* Most significant bits */
        0xaaaaaa0000ff0000;
        0x000000aa000000aa;
        0xbbbbabcdeffedcba;  /* Least significant bits */

Different iterations of for_each_set_clump:-
'offset' is the bit position and 'clump' is the 24 bit clump from the
above bitmap.
Iteration first:        offset: 0 clump: 0xfedcba
Iteration second:       offset: 24 clump: 0xabcdef
Iteration third:        offset: 48 clump: 0xaabbbb
Iteration fourth:       offset: 96 clump: 0xaa
Iteration fifth:        offset: 144 clump: 0xff
Iteration sixth:        offset: 168 clump: 0xaaaaaa
Iteration seventh:      offset: 216 clump: 0xff
Loop breaks because in the end the remaining bits (0x00aa) size was less
than clump size of 24 bits.

In above example it can be seen that in iteration third, the 24 bit clump
that was retrieved was split between bitmap[0] and bitmap[1]. This example 
also shows that 24 bit zeroes if present in between, were skipped (preserving
the previous for_each_set_macro8 behaviour). 

Example 2:
clump size = 6 bits, Number of clumps (or ports) = 3.

     /* bitmap memory region */
        0x00aa0000ff000000;  /* Most significant bits */
        0xaaaaaa0000ff0000;
        0x0f00000000000000;
        0x0000000000000ac0;  /* Least significant bits */

Different iterations of for_each_set_clump:
'offset' is the bit position and 'clump' is the 6 bit clump from the
above bitmap.
Iteration first:        offset: 6 clump: 0x2b
Loop breaks because 6 * 3 = 18 bits traversed in bitmap.
Here 6 * 3 is clump size * no. of clumps.

Syed Nayyar Waris (6):
  bitops: Introduce the the for_each_set_clump macro
  lib/test_bitmap.c: Add for_each_set_clump test cases
  gpio: thermal: Utilize for_each_set_clump macro
  bitops: Remove code related to for_each_set_clump8
  gpio: thunderx: Utilize for_each_set_clump macro
  gpio: xilinx: Utilize for_each_set_clump macro

 drivers/gpio/gpio-104-dio-48e.c            |   8 +--
 drivers/gpio/gpio-104-idi-48.c             |   4 +-
 drivers/gpio/gpio-74x164.c                 |   4 +-
 drivers/gpio/gpio-gpio-mm.c                |   8 +--
 drivers/gpio/gpio-max3191x.c               |   4 +-
 drivers/gpio/gpio-pca953x.c                |   4 +-
 drivers/gpio/gpio-pci-idio-16.c            |   8 +--
 drivers/gpio/gpio-pcie-idio-24.c           |   8 +--
 drivers/gpio/gpio-pisosr.c                 |   4 +-
 drivers/gpio/gpio-thunderx.c               |  12 ++--
 drivers/gpio/gpio-uniphier.c               |   4 +-
 drivers/gpio/gpio-ws16c48.c                |   8 +--
 drivers/gpio/gpio-xilinx.c                 |  64 +++++++++--------
 drivers/thermal/intel/intel_soc_dts_iosf.c |   6 +-
 include/asm-generic/bitops/find.h          |  12 ++--
 include/linux/bitmap.h                     |  60 +++++++++++-----
 include/linux/bitops.h                     |   9 +--
 lib/find_bit.c                             |  12 ++--
 lib/test_bitmap.c                          | 108 ++++++++++++++++++++++-------
 19 files changed, 220 insertions(+), 127 deletions(-)

-- 
2.7.4


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 3/6] gpio: thermal: Utilize for_each_set_clump macro
  2020-04-25 18:59 [PATCH v2 0/6] Introduce the for_each_set_clump macro Syed Nayyar Waris
@ 2020-04-25 19:05 ` Syed Nayyar Waris
  2020-04-25 19:26   ` Lukas Wunner
  0 siblings, 1 reply; 4+ messages in thread
From: Syed Nayyar Waris @ 2020-04-25 19:05 UTC (permalink / raw)
  To: akpm
  Cc: andriy.shevchenko, vilhelm.gray, linus.walleij, bgolaszewski,
	yamada.masahiro, rui.zhang, daniel.lezcano, amit.kucheria,
	linux-gpio, linux-kernel, linux-arm-kernel, linux-pm

This patch replaces all the existing for_each_set_clump8 and related
function calls in the drivers (gpio and thermal) with the equivalent
new generic for_each_set_clump macro.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Amit Kucheria <amit.kucheria@verdurent.com>
Signed-off-by: Syed Nayyar Waris <syednwaris@gmail.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
---
Changes in v2:
 - No change.

 drivers/gpio/gpio-104-dio-48e.c            | 8 ++++----
 drivers/gpio/gpio-104-idi-48.c             | 4 ++--
 drivers/gpio/gpio-74x164.c                 | 4 ++--
 drivers/gpio/gpio-gpio-mm.c                | 8 ++++----
 drivers/gpio/gpio-max3191x.c               | 4 ++--
 drivers/gpio/gpio-pca953x.c                | 4 ++--
 drivers/gpio/gpio-pci-idio-16.c            | 8 ++++----
 drivers/gpio/gpio-pcie-idio-24.c           | 8 ++++----
 drivers/gpio/gpio-pisosr.c                 | 4 ++--
 drivers/gpio/gpio-uniphier.c               | 4 ++--
 drivers/gpio/gpio-ws16c48.c                | 8 ++++----
 drivers/thermal/intel/intel_soc_dts_iosf.c | 6 +++---
 12 files changed, 35 insertions(+), 35 deletions(-)

diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c
index 1f7d9bb..60f0383 100644
--- a/drivers/gpio/gpio-104-dio-48e.c
+++ b/drivers/gpio/gpio-104-dio-48e.c
@@ -192,11 +192,11 @@ static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
 	/* clear bits array to a clean slate */
 	bitmap_zero(bits, chip->ngpio);
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		port_addr = dio48egpio->base + ports[offset / 8];
 		port_state = inb(port_addr) & gpio_mask;
 
-		bitmap_set_value8(bits, port_state, offset);
+		bitmap_set_value(bits, port_state, offset, 8);
 	}
 
 	return 0;
@@ -233,11 +233,11 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
 	unsigned long bitmask;
 	unsigned long flags;
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		index = offset / 8;
 		port_addr = dio48egpio->base + ports[index];
 
-		bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+		bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
 
 		raw_spin_lock_irqsave(&dio48egpio->lock, flags);
 
diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c
index d350ac0..03553a31 100644
--- a/drivers/gpio/gpio-104-idi-48.c
+++ b/drivers/gpio/gpio-104-idi-48.c
@@ -94,11 +94,11 @@ static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
 	/* clear bits array to a clean slate */
 	bitmap_zero(bits, chip->ngpio);
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		port_addr = idi48gpio->base + ports[offset / 8];
 		port_state = inb(port_addr) & gpio_mask;
 
-		bitmap_set_value8(bits, port_state, offset);
+		bitmap_set_value(bits, port_state, offset, 8);
 	}
 
 	return 0;
diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c
index 05637d5..a836433 100644
--- a/drivers/gpio/gpio-74x164.c
+++ b/drivers/gpio/gpio-74x164.c
@@ -79,9 +79,9 @@ static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
 	unsigned long bitmask;
 
 	mutex_lock(&chip->lock);
-	for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) {
+	for_each_set_clump(offset, bankmask, mask, chip->registers * 8, 8) {
 		bank = chip->registers - 1 - offset / 8;
-		bitmask = bitmap_get_value8(bits, offset) & bankmask;
+		bitmask = bitmap_get_value(bits, offset, 8) & bankmask;
 
 		chip->buffer[bank] &= ~bankmask;
 		chip->buffer[bank] |= bitmask;
diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c
index b89b8c5..5790bb7 100644
--- a/drivers/gpio/gpio-gpio-mm.c
+++ b/drivers/gpio/gpio-gpio-mm.c
@@ -181,11 +181,11 @@ static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
 	/* clear bits array to a clean slate */
 	bitmap_zero(bits, chip->ngpio);
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		port_addr = gpiommgpio->base + ports[offset / 8];
 		port_state = inb(port_addr) & gpio_mask;
 
-		bitmap_set_value8(bits, port_state, offset);
+		bitmap_set_value(bits, port_state, offset, 8);
 	}
 
 	return 0;
@@ -223,11 +223,11 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip,
 	unsigned long bitmask;
 	unsigned long flags;
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		index = offset / 8;
 		port_addr = gpiommgpio->base + ports[index];
 
-		bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+		bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
 
 		spin_lock_irqsave(&gpiommgpio->lock, flags);
 
diff --git a/drivers/gpio/gpio-max3191x.c b/drivers/gpio/gpio-max3191x.c
index 310d1a2..e59f09b 100644
--- a/drivers/gpio/gpio-max3191x.c
+++ b/drivers/gpio/gpio-max3191x.c
@@ -245,7 +245,7 @@ static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
 		goto out_unlock;
 
 	bitmap_zero(bits, gpio->ngpio);
-	for_each_set_clump8(bit, gpio_mask, mask, gpio->ngpio) {
+	for_each_set_clump(bit, gpio_mask, mask, gpio->ngpio, 8) {
 		unsigned int chipnum = bit / MAX3191X_NGPIO;
 
 		if (max3191x_chip_is_faulting(max3191x, chipnum)) {
@@ -255,7 +255,7 @@ static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
 
 		in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
 		in &= gpio_mask;
-		bitmap_set_value8(bits, in, bit);
+		bitmap_set_value(bits, in, bit, 8);
 	}
 
 out_unlock:
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 60ae18e..c1bc8fa 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -343,7 +343,7 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long
 	int i, ret;
 
 	for (i = 0; i < NBANK(chip); i++)
-		value[i] = bitmap_get_value8(val, i * BANK_SZ);
+		value[i] = bitmap_get_value(val, i * BANK_SZ, 8);
 
 	ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
 	if (ret < 0) {
@@ -367,7 +367,7 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *
 	}
 
 	for (i = 0; i < NBANK(chip); i++)
-		bitmap_set_value8(val, value[i], i * BANK_SZ);
+		bitmap_set_value(val, value[i], i * BANK_SZ, 8);
 
 	return 0;
 }
diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c
index 638d665..f970756 100644
--- a/drivers/gpio/gpio-pci-idio-16.c
+++ b/drivers/gpio/gpio-pci-idio-16.c
@@ -112,11 +112,11 @@ static int idio_16_gpio_get_multiple(struct gpio_chip *chip,
 	/* clear bits array to a clean slate */
 	bitmap_zero(bits, chip->ngpio);
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		port_addr = ports[offset / 8];
 		port_state = ioread8(port_addr) & gpio_mask;
 
-		bitmap_set_value8(bits, port_state, offset);
+		bitmap_set_value(bits, port_state, offset, 8);
 	}
 
 	return 0;
@@ -167,11 +167,11 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
 	unsigned long flags;
 	unsigned long out_state;
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		index = offset / 8;
 		port_addr = ports[index];
 
-		bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+		bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
 
 		raw_spin_lock_irqsave(&idio16gpio->lock, flags);
 
diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c
index 1d47579..be5cb13 100644
--- a/drivers/gpio/gpio-pcie-idio-24.c
+++ b/drivers/gpio/gpio-pcie-idio-24.c
@@ -215,7 +215,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip,
 	/* clear bits array to a clean slate */
 	bitmap_zero(bits, chip->ngpio);
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		index = offset / 8;
 
 		/* read bits from current gpio port (port 6 is TTL GPIO) */
@@ -228,7 +228,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip,
 
 		port_state &= gpio_mask;
 
-		bitmap_set_value8(bits, port_state, offset);
+		bitmap_set_value(bits, port_state, offset, 8);
 	}
 
 	return 0;
@@ -291,10 +291,10 @@ static void idio_24_gpio_set_multiple(struct gpio_chip *chip,
 	unsigned long out_state;
 	const unsigned long out_mode_mask = BIT(1);
 
-	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+	for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
 		index = offset / 8;
 
-		bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+		bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
 
 		raw_spin_lock_irqsave(&idio24gpio->lock, flags);
 
diff --git a/drivers/gpio/gpio-pisosr.c b/drivers/gpio/gpio-pisosr.c
index 6698fea..5c9c73c 100644
--- a/drivers/gpio/gpio-pisosr.c
+++ b/drivers/gpio/gpio-pisosr.c
@@ -103,9 +103,9 @@ static int pisosr_gpio_get_multiple(struct gpio_chip *chip,
 	pisosr_gpio_refresh(gpio);
 
 	bitmap_zero(bits, chip->ngpio);
-	for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
+	for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 8) {
 		buffer_state = gpio->buffer[offset / 8] & gpio_mask;
-		bitmap_set_value8(bits, buffer_state, offset);
+		bitmap_set_value(bits, buffer_state, offset, 8);
 	}
 
 	return 0;
diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c
index f99f3c1..47738d8 100644
--- a/drivers/gpio/gpio-uniphier.c
+++ b/drivers/gpio/gpio-uniphier.c
@@ -149,9 +149,9 @@ static void uniphier_gpio_set_multiple(struct gpio_chip *chip,
 {
 	unsigned long i, bank, bank_mask, bank_bits;
 
-	for_each_set_clump8(i, bank_mask, mask, chip->ngpio) {
+	for_each_set_clump(i, bank_mask, mask, chip->ngpio, UNIPHIER_GPIO_LINES_PER_BANK) {
 		bank = i / UNIPHIER_GPIO_LINES_PER_BANK;
-		bank_bits = bitmap_get_value8(bits, i);
+		bank_bits = bitmap_get_value(bits, i, UNIPHIER_GPIO_LINES_PER_BANK);
 
 		uniphier_gpio_bank_write(chip, bank, UNIPHIER_GPIO_PORT_DATA,
 					 bank_mask, bank_bits);
diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c
index cb510df..87b532c 100644
--- a/drivers/gpio/gpio-ws16c48.c
+++ b/drivers/gpio/gpio-ws16c48.c
@@ -137,11 +137,11 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip,
 	/* clear bits array to a clean slate */
 	bitmap_zero(bits, chip->ngpio);
 
-	for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
+	for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 8) {
 		port_addr = ws16c48gpio->base + offset / 8;
 		port_state = inb(port_addr) & gpio_mask;
 
-		bitmap_set_value8(bits, port_state, offset);
+		bitmap_set_value(bits, port_state, offset, 8);
 	}
 
 	return 0;
@@ -182,13 +182,13 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
 	unsigned long bitmask;
 	unsigned long flags;
 
-	for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
+	for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 8) {
 		index = offset / 8;
 		port_addr = ws16c48gpio->base + index;
 
 		/* mask out GPIO configured for input */
 		gpio_mask &= ~ws16c48gpio->io_state[index];
-		bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+		bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
 
 		raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
 
diff --git a/drivers/thermal/intel/intel_soc_dts_iosf.c b/drivers/thermal/intel/intel_soc_dts_iosf.c
index f75271b..39b6305 100644
--- a/drivers/thermal/intel/intel_soc_dts_iosf.c
+++ b/drivers/thermal/intel/intel_soc_dts_iosf.c
@@ -123,7 +123,7 @@ static int update_trip_temp(struct intel_soc_dts_sensor_entry *dts,
 		return status;
 
 	update_ptps = store_ptps;
-	bitmap_set_value8(&update_ptps, temp_out & 0xFF, thres_index * 8);
+	bitmap_set_value(&update_ptps, temp_out & 0xFF, thres_index * 8, 8);
 	out = update_ptps;
 
 	status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
@@ -237,7 +237,7 @@ static int sys_get_curr_temp(struct thermal_zone_device *tzd,
 		return status;
 
 	raw = out;
-	out = bitmap_get_value8(&raw, dts->id * 8) - SOC_DTS_TJMAX_ENCODING;
+	out = bitmap_get_value(&raw, dts->id * 8, 8) - SOC_DTS_TJMAX_ENCODING;
 	*temp = sensors->tj_max - out * 1000;
 
 	return 0;
@@ -314,7 +314,7 @@ static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
 		trip_mask = 0;
 	else {
 		ptps = store_ptps;
-		for_each_set_clump8(i, trip, &ptps, writable_trip_cnt * 8)
+		for_each_set_clump(i, trip, &ptps, writable_trip_cnt * 8, 8)
 			trip_mask &= ~BIT(i / 8);
 	}
 	dts->trip_mask = trip_mask;
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2 3/6] gpio: thermal: Utilize for_each_set_clump macro
  2020-04-25 19:05 ` [PATCH v2 3/6] gpio: thermal: Utilize " Syed Nayyar Waris
@ 2020-04-25 19:26   ` Lukas Wunner
  2020-04-25 19:54     ` Syed Nayyar Waris
  0 siblings, 1 reply; 4+ messages in thread
From: Lukas Wunner @ 2020-04-25 19:26 UTC (permalink / raw)
  To: Syed Nayyar Waris
  Cc: akpm, andriy.shevchenko, vilhelm.gray, linus.walleij,
	bgolaszewski, yamada.masahiro, rui.zhang, daniel.lezcano,
	amit.kucheria, linux-gpio, linux-kernel, linux-arm-kernel,
	linux-pm

On Sun, Apr 26, 2020 at 12:35:02AM +0530, Syed Nayyar Waris wrote:
> This patch replaces all the existing for_each_set_clump8 and related
> function calls in the drivers (gpio and thermal) with the equivalent
> new generic for_each_set_clump macro.

Why are patches [3/6] and [4/6] included in v2 even though William
said they should be ignored?

Again, replacing for_each_set_clump8() with for_each_set_clump()
does not provide any benefit but may impact performance and makes
the code more difficult to follow.  So once more, please do not
change drivers which are known to work fine with 8 bit clumps,
specifically gpio-max3191x.c and gpio-74x164.c.

Please in the future include a list of the changes you've made
in the cover letter, not just in each individual patch.

Thanks,

Lukas

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v2 3/6] gpio: thermal: Utilize for_each_set_clump macro
  2020-04-25 19:26   ` Lukas Wunner
@ 2020-04-25 19:54     ` Syed Nayyar Waris
  0 siblings, 0 replies; 4+ messages in thread
From: Syed Nayyar Waris @ 2020-04-25 19:54 UTC (permalink / raw)
  To: Lukas Wunner
  Cc: Andrew Morton, Andy Shevchenko, William Breathitt Gray,
	Linus Walleij, bgolaszewski, yamada.masahiro, rui.zhang,
	Daniel Lezcano, amit.kucheria, linux-gpio,
	Linux Kernel Mailing List, linux-arm-kernel, linux-pm

On Sun, Apr 26, 2020 at 12:56 AM Lukas Wunner <lukas@wunner.de> wrote:
>
> On Sun, Apr 26, 2020 at 12:35:02AM +0530, Syed Nayyar Waris wrote:
> > This patch replaces all the existing for_each_set_clump8 and related
> > function calls in the drivers (gpio and thermal) with the equivalent
> > new generic for_each_set_clump macro.
>
> Why are patches [3/6] and [4/6] included in v2 even though William
> said they should be ignored?
>
> Again, replacing for_each_set_clump8() with for_each_set_clump()
> does not provide any benefit but may impact performance and makes
> the code more difficult to follow.  So once more, please do not
> change drivers which are known to work fine with 8 bit clumps,
> specifically gpio-max3191x.c and gpio-74x164.c.
>
> Please in the future include a list of the changes you've made
> in the cover letter, not just in each individual patch.
>
> Thanks,
>
> Lukas

Hi Lukas,
Your concerns are noted. [3/6] and [4/6] won't be included in the next
version v3 of the patchset.

Regards
Syed Nayyar Waris

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-04-25 19:54 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-25 18:59 [PATCH v2 0/6] Introduce the for_each_set_clump macro Syed Nayyar Waris
2020-04-25 19:05 ` [PATCH v2 3/6] gpio: thermal: Utilize " Syed Nayyar Waris
2020-04-25 19:26   ` Lukas Wunner
2020-04-25 19:54     ` Syed Nayyar Waris

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