* [PATCH v2 0/2] Add R8A77980 RPC-IF support
@ 2020-05-19 20:11 Sergei Shtylyov
2020-05-19 20:13 ` PATCH v2 1/2] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
2020-05-19 20:14 ` [PATCH v2 2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support Sergei Shtylyov
0 siblings, 2 replies; 5+ messages in thread
From: Sergei Shtylyov @ 2020-05-19 20:11 UTC (permalink / raw)
To: Geert Uytterhoeven, devicetree, Rob Herring
Cc: linux-renesas-soc, Magnus Damm
Hello!
Here's the set of 2 patches against Geert's 'renesas-devel.git' repo's
'renesas-devel-2020-06-18-v5.7-rc6' tag. I'm adding the RPC-IF device node
for R8A77980 (based on the RPC-IF driver) and describing the QSPI flashes
connected to RPC-IF on the Condor and V3H Starter Kit boards.
I've removed the R8A77970 parts in this version as the RPC-IF driver support
for that SoC isn't complete yet.
[1/2] arm64: dts: renesas: r8a77980: add RPC-IF support
[2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support
WBR, Sergei
^ permalink raw reply [flat|nested] 5+ messages in thread
* PATCH v2 1/2] arm64: dts: renesas: r8a77980: add RPC-IF support
2020-05-19 20:11 [PATCH v2 0/2] Add R8A77980 RPC-IF support Sergei Shtylyov
@ 2020-05-19 20:13 ` Sergei Shtylyov
2020-07-07 9:42 ` Geert Uytterhoeven
2020-05-19 20:14 ` [PATCH v2 2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support Sergei Shtylyov
1 sibling, 1 reply; 5+ messages in thread
From: Sergei Shtylyov @ 2020-05-19 20:13 UTC (permalink / raw)
To: Geert Uytterhoeven, devicetree, Rob Herring
Cc: linux-renesas-soc, Magnus Damm
Describe RPC-IF in the R8A77980 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- removed the R8A77970 part, renamed the patch, and updated the description;
- renamed the RPC-IF node to "spi@ee200000";
- updated the R8A77980 RPC-IF "compatible" prop to match the bindings;
- split the 1st region in the "reg"/"reg-names" props for the WBUF registers;
- refreshed the patch.
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
Index: renesas-devel/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas-devel.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas-devel/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -1344,6 +1344,23 @@
status = "disabled";
};
+ rpc: spi@ee200000 {
+ compatible = "renesas,r8a77980-rpc-if",
+ "renesas,rcar-gen3-rpc-if";
+ reg = <0 0xee200000 0 0x200>,
+ <0 0x08000000 0 0x4000000>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ clock-names = "rpc";
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support
2020-05-19 20:11 [PATCH v2 0/2] Add R8A77980 RPC-IF support Sergei Shtylyov
2020-05-19 20:13 ` PATCH v2 1/2] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
@ 2020-05-19 20:14 ` Sergei Shtylyov
2020-07-07 9:54 ` Geert Uytterhoeven
1 sibling, 1 reply; 5+ messages in thread
From: Sergei Shtylyov @ 2020-05-19 20:14 UTC (permalink / raw)
To: Geert Uytterhoeven, devicetree, Rob Herring
Cc: linux-renesas-soc, Magnus Damm
Define the Condor/V3HSK board dependent parts of the RPC-IF device node.
Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it.
Based on the original patches by Dmitry Shifrin.
Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- removed the "renesas,rpc-mode" prop from the RPC-IF device nodes;
- lowercased the hex numbers in the "reg" props and the <unit-address> parts
of the node names;
- removed the leading zeros from the <unit-address> parts of the node names;
- refreshed the patch.
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 67 ++++++++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 67 ++++++++++++++++++++++++
2 files changed, 134 insertions(+)
Index: renesas-devel/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
===================================================================
--- renesas-devel.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ renesas-devel/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -262,6 +262,11 @@
power-source = <1800>;
};
+ qspi0_pins: qspi0 {
+ groups = "qspi0_ctrl", "qspi0_data4";
+ function = "qspi0";
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
@@ -273,6 +278,68 @@
};
};
+&rpc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash@0 {
+ compatible = "spansion,s25fs512s", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootparam@0 {
+ reg = <0x00000000 0x040000>;
+ read-only;
+ };
+ cr7@40000 {
+ reg = <0x00040000 0x080000>;
+ read-only;
+ };
+ cert_header_sa3@c0000 {
+ reg = <0x000c0000 0x080000>;
+ read-only;
+ };
+ bl2@140000 {
+ reg = <0x00140000 0x040000>;
+ read-only;
+ };
+ cert_header_sa6@180000 {
+ reg = <0x00180000 0x040000>;
+ read-only;
+ };
+ bl31@1c0000 {
+ reg = <0x001c0000 0x460000>;
+ read-only;
+ };
+ uboot@640000 {
+ reg = <0x00640000 0x0c0000>;
+ read-only;
+ };
+ uboot-env@700000 {
+ reg = <0x00700000 0x040000>;
+ read-only;
+ };
+ dtb@740000 {
+ reg = <0x00740000 0x080000>;
+ };
+ kernel@7c0000 {
+ reg = <0x007c0000 0x1400000>;
+ };
+ user@1bc0000 {
+ reg = <0x01bc0000 0x2440000>;
+ };
+ };
+ };
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";
Index: renesas-devel/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
===================================================================
--- renesas-devel.orig/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
+++ renesas-devel/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
@@ -187,6 +187,11 @@
function = "i2c0";
};
+ qspi0_pins: qspi0 {
+ groups = "qspi0_ctrl", "qspi0_data4";
+ function = "qspi0";
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
@@ -198,6 +203,68 @@
};
};
+&rpc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash@0 {
+ compatible = "spansion,s25fs512s", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootparam@0 {
+ reg = <0x00000000 0x040000>;
+ read-only;
+ };
+ cr7@40000 {
+ reg = <0x00040000 0x080000>;
+ read-only;
+ };
+ cert_header_sa3@c0000 {
+ reg = <0x000c0000 0x080000>;
+ read-only;
+ };
+ bl2@140000 {
+ reg = <0x00140000 0x040000>;
+ read-only;
+ };
+ cert_header_sa6@180000 {
+ reg = <0x00180000 0x040000>;
+ read-only;
+ };
+ bl31@1c0000 {
+ reg = <0x001c0000 0x460000>;
+ read-only;
+ };
+ uboot@640000 {
+ reg = <0x00640000 0x0c0000>;
+ read-only;
+ };
+ uboot-env@700000 {
+ reg = <0x00700000 0x040000>;
+ read-only;
+ };
+ dtb@740000 {
+ reg = <0x00740000 0x080000>;
+ };
+ kernel@7c0000 {
+ reg = <0x007c0000 0x1400000>;
+ };
+ user@1bc0000 {
+ reg = <0x01bc0000 0x2440000>;
+ };
+ };
+ };
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: PATCH v2 1/2] arm64: dts: renesas: r8a77980: add RPC-IF support
2020-05-19 20:13 ` PATCH v2 1/2] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
@ 2020-07-07 9:42 ` Geert Uytterhoeven
0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2020-07-07 9:42 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Linux-Renesas, Magnus Damm
On Tue, May 19, 2020 at 10:13 PM Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Describe RPC-IF in the R8A77980 device tree.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.9.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support
2020-05-19 20:14 ` [PATCH v2 2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support Sergei Shtylyov
@ 2020-07-07 9:54 ` Geert Uytterhoeven
0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2020-07-07 9:54 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Linux-Renesas, Magnus Damm
Hi Sergei,
On Tue, May 19, 2020 at 10:14 PM Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Define the Condor/V3HSK board dependent parts of the RPC-IF device node.
> Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it.
>
> Based on the original patches by Dmitry Shifrin.
>
> Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.9.
However, one question below...
> --- renesas-devel.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
> +++ renesas-devel/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
> @@ -273,6 +278,68 @@
> };
> };
>
> +&rpc {
> + pinctrl-0 = <&qspi0_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + flash@0 {
> + compatible = "spansion,s25fs512s", "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <50000000>;
> + spi-rx-bus-width = <4>;
Why no "spi-tx-bus-width = <4>;"? Same for V3HSK.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-05-19 20:11 [PATCH v2 0/2] Add R8A77980 RPC-IF support Sergei Shtylyov
2020-05-19 20:13 ` PATCH v2 1/2] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
2020-07-07 9:42 ` Geert Uytterhoeven
2020-05-19 20:14 ` [PATCH v2 2/2] arm64: dts: renesas: r8a77980: condor/v3hsk: add QSPI flash support Sergei Shtylyov
2020-07-07 9:54 ` Geert Uytterhoeven
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