* [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
@ 2019-02-21 14:04 Geert Uytterhoeven
2019-02-21 14:09 ` Fabrizio Castro
0 siblings, 1 reply; 3+ messages in thread
From: Geert Uytterhoeven @ 2019-02-21 14:04 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: Fabrizio Castro, linux-renesas-soc, Geert Uytterhoeven, Takeshi Kihara
Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for
R-Car E3.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Untested due to lack of hardware.
---
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 61a0afb74e6310b2..1ea684af99c4a19b 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Source for the RZ/G2E (R8A774C0) SoC
*
- * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018-2019 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
@@ -1150,9 +1150,8 @@
<&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
- <&dmac2 0x5b>, <&dmac2 0x5a>;
- dma-names = "tx", "rx", "tx", "rx";
+ dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 202>;
status = "disabled";
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* RE: [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
2019-02-21 14:04 [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels Geert Uytterhoeven
@ 2019-02-21 14:09 ` Fabrizio Castro
2019-02-25 9:38 ` Simon Horman
0 siblings, 1 reply; 3+ messages in thread
From: Fabrizio Castro @ 2019-02-21 14:09 UTC (permalink / raw)
To: Geert Uytterhoeven, Simon Horman, Magnus Damm
Cc: linux-renesas-soc, TAKESHI KIHARA
> From: linux-renesas-soc-owner@vger.kernel.org <linux-renesas-soc-owner@vger.kernel.org> On Behalf Of Geert Uytterhoeven
> Sent: 21 February 2019 14:04
> Subject: [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
>
> Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for
> R-Car E3.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> ---
> Untested due to lack of hardware.
> ---
> arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> index 61a0afb74e6310b2..1ea684af99c4a19b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> @@ -2,7 +2,7 @@
> /*
> * Device Tree Source for the RZ/G2E (R8A774C0) SoC
> *
> - * Copyright (C) 2018 Renesas Electronics Corp.
> + * Copyright (C) 2018-2019 Renesas Electronics Corp.
> */
>
> #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
> @@ -1150,9 +1150,8 @@
> <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
> <&scif_clk>;
> clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
> - <&dmac2 0x5b>, <&dmac2 0x5a>;
> - dma-names = "tx", "rx", "tx", "rx";
> + dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
> + dma-names = "tx", "rx";
> power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
> resets = <&cpg 202>;
> status = "disabled";
> --
> 2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
2019-02-21 14:09 ` Fabrizio Castro
@ 2019-02-25 9:38 ` Simon Horman
0 siblings, 0 replies; 3+ messages in thread
From: Simon Horman @ 2019-02-25 9:38 UTC (permalink / raw)
To: Fabrizio Castro
Cc: Geert Uytterhoeven, Magnus Damm, linux-renesas-soc, TAKESHI KIHARA
On Thu, Feb 21, 2019 at 02:09:12PM +0000, Fabrizio Castro wrote:
> > From: linux-renesas-soc-owner@vger.kernel.org <linux-renesas-soc-owner@vger.kernel.org> On Behalf Of Geert Uytterhoeven
> > Sent: 21 February 2019 14:04
> > Subject: [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
> >
> > Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for
> > R-Car E3.
> >
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Thanks, applied as a fix for v5.1.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-02-21 14:04 [PATCH] arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels Geert Uytterhoeven
2019-02-21 14:09 ` Fabrizio Castro
2019-02-25 9:38 ` Simon Horman
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