From: patchwork-bot+linux-riscv@kernel.org
To: Jisheng Zhang <jszhang@kernel.org>
Cc: linux-riscv@lists.infradead.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/2] riscv: Reduce ARCH_KMALLOC_MINALIGN to 8
Date: Wed, 30 Aug 2023 13:20:34 +0000 [thread overview]
Message-ID: <169340163450.19859.9050440300788859353.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20230718152214.2907-1-jszhang@kernel.org>
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Tue, 18 Jul 2023 23:22:12 +0800 you wrote:
> Currently, riscv defines ARCH_DMA_MINALIGN as L1_CACHE_BYTES, I.E
> 64Bytes, if CONFIG_RISCV_DMA_NONCOHERENT=y. To support unified kernel
> Image, usually we have to enable CONFIG_RISCV_DMA_NONCOHERENT, thus
> it brings some bad effects to coherent platforms:
>
> Firstly, it wastes memory, kmalloc-96, kmalloc-32, kmalloc-16 and
> kmalloc-8 slab caches don't exist any more, they are replaced with
> either kmalloc-128 or kmalloc-64.
>
> [...]
Here is the summary with links:
- [v3,1/2] riscv: allow kmalloc() caches aligned to the smallest value
https://git.kernel.org/riscv/c/2926715163cf
- [v3,2/2] riscv: enable DMA_BOUNCE_UNALIGNED_KMALLOC for !dma_coherent
https://git.kernel.org/riscv/c/f51f7a0fc2f4
You are awesome, thank you!
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prev parent reply other threads:[~2023-08-30 13:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-18 15:22 [PATCH v3 0/2] riscv: Reduce ARCH_KMALLOC_MINALIGN to 8 Jisheng Zhang
2023-07-18 15:22 ` [PATCH v3 1/2] riscv: allow kmalloc() caches aligned to the smallest value Jisheng Zhang
2023-07-24 7:49 ` Conor Dooley
2023-07-18 15:22 ` [PATCH v3 2/2] riscv: enable DMA_BOUNCE_UNALIGNED_KMALLOC for !dma_coherent Jisheng Zhang
2023-08-30 13:20 ` patchwork-bot+linux-riscv [this message]
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