From: Christoph Hellwig <hch@infradead.org>
To: Anup Patel <Anup.Patel@wdc.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
Palmer Dabbelt <palmer@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <Atish.Patra@wdc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v3 1/3] RISC-V: Use tabs to align macro values in asm/csr.h
Date: Tue, 23 Apr 2019 23:27:36 -0700 [thread overview]
Message-ID: <20190424062736.GA10400@infradead.org> (raw)
In-Reply-To: <20190415093648.7525-2-anup.patel@wdc.com>
On Mon, Apr 15, 2019 at 09:37:17AM +0000, Anup Patel wrote:
> The spacing between macro name and value is not consistent in
> asm/csr.h. This patch beautifies asm/csr.h by using tabs to align
> macro values instead of spaces.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
Looks good,
Reviewed-by: Christoph Hellwig <hch@lst.de>
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next prev parent reply other threads:[~2019-04-24 6:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-15 9:37 [PATCH v3 0/3] Allow accessing CSR using CSR number Anup Patel
2019-04-15 9:37 ` [PATCH v3 1/3] RISC-V: Use tabs to align macro values in asm/csr.h Anup Patel
2019-04-24 6:27 ` Christoph Hellwig [this message]
2019-04-15 9:37 ` [PATCH v3 2/3] RISC-V: Add interrupt related SCAUSE defines " Anup Patel
2019-04-24 6:29 ` Christoph Hellwig
2019-04-24 6:45 ` Anup Patel
2019-04-24 15:01 ` Christoph Hellwig
2019-04-25 5:04 ` Anup Patel
2019-04-15 9:37 ` [PATCH v3 3/3] RISC-V: Access CSRs using CSR numbers Anup Patel
2019-04-24 6:30 ` Christoph Hellwig
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