From: Conor Dooley <conor@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, linux-kernel@vger.kernel.org,
christoph.muellner@vrull.eu, David.Laight@aculab.com,
Heiko Stuebner <heiko.stuebner@vrull.eu>
Subject: Re: [PATCH v3 2/2] riscv: Add Zawrs support for spinlocks
Date: Mon, 22 May 2023 18:43:14 +0100 [thread overview]
Message-ID: <20230522-karaoke-reproduce-be1bb503b49c@spud> (raw)
In-Reply-To: <20230521114715.955823-3-heiko.stuebner@vrull.eu>
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Hey Heiko,
On Sun, May 21, 2023 at 01:47:15PM +0200, Heiko Stuebner wrote:
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> The current RISC-V code uses the generic ticket lock implementation,
> that calls the macros smp_cond_load_relaxed() and smp_cond_load_acquire().
> Currently, RISC-V uses the generic implementation of these macros.
> This patch introduces a RISC-V specific implementation, of these
> macros, that peels off the first loop iteration and modifies the waiting
> loop such, that it is possible to use the WRS.STO instruction of the Zawrs
> ISA extension to stall the CPU.
>
> The resulting implementation of smp_cond_load_*() will only work for
> 32-bit or 64-bit types for RV64 and 32-bit types for RV32.
> This is caused by the restrictions of the LR instruction (RISC-V only
> has LR.W and LR.D). Compiler assertions guard this new restriction.
>
> This patch uses the existing RISC-V ISA extension framework
> to detect the presence of Zawrs at run-time.
> If available a NOP instruction will be replaced by WRS.NTO or WRS.STO.
>
> The whole mechanism is gated by Kconfig setting, which defaults to Y.
>
> The Zawrs specification can be found here:
> https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> [rebase, update to review comments]
> Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
I do intend actually reviewing these two, but busy this week with dt
stuff! In the interim, got some build complaints..
gcc-13 & clang-16 allmodconfig:
kernel/rcu/rcuscale.c:819:3: warning: logical not is only applied to the left hand side of this comparison [-Wlogical-not-parentheses]
k210_nommu_defconfig:
include/linux/atomic/atomic-arch-fallback.h:249:23: error: implicit declaration of function 'smp_load_acquire' [-Werror=implicit-function-declaration]
include/linux/atomic/atomic-arch-fallback.h:265:17: error: implicit declaration of function 'smp_store_release' [-Werror=implicit-function-declaration]
Thanks,
Conor.
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next prev parent reply other threads:[~2023-05-22 17:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-21 11:47 [PATCH v3 0/2] Add Zawrs support and use it for spinlocks Heiko Stuebner
2023-05-21 11:47 ` [PATCH v3 1/2] riscv: don't include kernel.h into alternative.h Heiko Stuebner
2023-05-24 14:01 ` Andrew Jones
2023-05-21 11:47 ` [PATCH v3 2/2] riscv: Add Zawrs support for spinlocks Heiko Stuebner
2023-05-22 17:43 ` Conor Dooley [this message]
2023-05-24 17:05 ` Andrew Jones
2023-05-24 23:00 ` Palmer Dabbelt
2023-05-30 18:45 ` Andrea Parri
2023-10-19 14:21 ` [PATCH v3 0/2] Add Zawrs support and use it " Andrea Parri
2023-10-19 16:22 ` Christoph Müllner
2023-10-20 10:19 ` Andrea Parri
2024-01-08 11:35 ` Andrew Jones
2024-01-08 13:38 ` Andrea Parri
2024-01-08 14:00 ` Christoph Müllner
2024-01-08 14:10 ` Andrew Jones
2024-03-05 23:31 ` Charlie Jenkins
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