From: William Qiu <william.qiu@starfivetech.com>
To: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Linus Walleij <linus.walleij@linaro.org>,
William Qiu <william.qiu@starfivetech.com>
Subject: [PATCH v1 0/2] Add SPI module for StarFive JH7110 SoC
Date: Tue, 4 Jul 2023 17:19:42 +0800 [thread overview]
Message-ID: <20230704091948.85247-1-william.qiu@starfivetech.com> (raw)
Hi,
This patchset adds initial rudimentary support for the StarFive
SPI controller. And this driver will be used in StarFive's
VisionFive 2 board. The first patch constrain minItems of clocks
for JH7110 SPI and Patch 2 adds support for StarFive JH7110 SPI.
The patch series is based on v6.4rc7.
William Qiu (2):
dt-binding: spi: constrain minItems of clocks and clock-names
riscv: dts: starfive: Add spi node for JH7110 SoC
.../devicetree/bindings/spi/spi-pl022.yaml | 11 ++-
.../jh7110-starfive-visionfive-2.dtsi | 52 ++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 98 +++++++++++++++++++
3 files changed, 158 insertions(+), 3 deletions(-)
--
2.34.1
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next reply other threads:[~2023-07-04 9:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 9:19 William Qiu [this message]
2023-07-04 9:19 ` [PATCH v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names William Qiu
2023-07-04 9:19 ` [PATCH v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC William Qiu
2023-07-04 9:19 ` [PATCH v4 0/3] Add initialization of clock for StarFive " William Qiu
2023-07-04 9:19 ` [PATCH v4 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu
2023-07-04 9:19 ` [PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
2023-07-04 9:19 ` [PATCH v4 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu
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