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From: Conor Dooley <conor@kernel.org>
To: Mayuresh Chitale <mchitale@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Anup Patel <anup@brainfault.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Atish Patra <atishp@atishpatra.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v1 1/6] RISC-V: Detect Smstateen extension
Date: Wed, 19 Jul 2023 17:27:16 +0100	[thread overview]
Message-ID: <20230719-egomaniac-precook-adf506f2a141@spud> (raw)
In-Reply-To: <20230719160316.4048022-2-mchitale@ventanamicro.com>


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Hey,

On Wed, Jul 19, 2023 at 09:33:11PM +0530, Mayuresh Chitale wrote:
> Extend the ISA string parsing to detect the Smstateen extension
> 
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>

> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index bdcf460ea53d..41c3aefcc53f 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -301,6 +301,8 @@ void __init riscv_fill_hwcap(void)
>  			} else {
>  				/* sorted alphabetically */
>  				SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA);
> +				SET_ISA_EXT_MAP("smstateen",
> +						RISCV_ISA_EXT_SMSTATEEN);

This easily fits on one line & "smstateen" needs to be documented in
riscv/extensions.yaml.

Thanks,
Conor.


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  reply	other threads:[~2023-07-19 16:27 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-19 16:03 [PATCH v1 0/6] Risc-V Kvm Smstateen Mayuresh Chitale
2023-07-19 16:03 ` [PATCH v1 1/6] RISC-V: Detect Smstateen extension Mayuresh Chitale
2023-07-19 16:27   ` Conor Dooley [this message]
2023-07-21  7:49     ` mchitale
2023-07-19 16:03 ` [PATCH v1 2/6] RISC-V: KVM: Add kvm_vcpu_config Mayuresh Chitale
2023-07-19 16:03 ` [PATCH v1 3/6] RISC-V: KVM: Enable Smstateen accesses Mayuresh Chitale
2023-07-19 16:03 ` [PATCH v1 4/6] RISCV: KVM: Add senvcfg context save/restore Mayuresh Chitale
2023-07-19 16:03 ` [PATCH v1 5/6] RISCV: KVM: Add sstateen0 " Mayuresh Chitale
2023-07-19 16:03 ` [PATCH v1 6/6] RISCV: KVM: Add sstateen0 to ONE_REG Mayuresh Chitale

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