From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Frank Rowand <frowand.list@gmail.com>,
Conor Dooley <conor+dt@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
devicetree@vger.kernel.org,
Saravana Kannan <saravanak@google.com>,
Anup Patel <anup@brainfault.org>,
linux-kernel@vger.kernel.org, Atish Patra <atishp@atishpatra.org>,
linux-riscv@lists.infradead.org,
Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v6 01/14] RISC-V: Add riscv_get_intc_hartid() function
Date: Wed, 19 Jul 2023 17:05:29 +0530 [thread overview]
Message-ID: <20230719113542.2293295-2-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230719113542.2293295-1-apatel@ventanamicro.com>
We add a common riscv_get_intc_hartid() which help device drivers to
get hartid of the HART associated with a INTC (i.e. local interrupt
controller) fwnode. This new function is more generic compared to
the existing riscv_of_parent_hartid() function hence we also replace
use of riscv_of_parent_hartid() with riscv_get_intc_hartid().
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/asm/processor.h | 4 +++-
arch/riscv/kernel/cpu.c | 19 ++++++++++++++++++-
drivers/irqchip/irq-riscv-intc.c | 2 +-
drivers/irqchip/irq-sifive-plic.c | 3 ++-
4 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
index c950a8d9edef..662da1e112dd 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -79,7 +79,9 @@ static inline void wait_for_interrupt(void)
struct device_node;
int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid);
-int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
+
+struct fwnode_handle;
+int riscv_get_intc_hartid(struct fwnode_handle *node, unsigned long *hartid);
extern void riscv_fill_hwcap(void);
extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index a2fc952318e9..5d26430fbcbd 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -81,7 +81,8 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har
* To achieve this, we walk up the DT tree until we find an active
* RISC-V core (HART) node and extract the cpuid from it.
*/
-int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
+static int riscv_of_parent_hartid(struct device_node *node,
+ unsigned long *hartid)
{
int rc;
@@ -96,6 +97,22 @@ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
return -1;
}
+/* Find hart ID of the INTC fwnode. */
+int riscv_get_intc_hartid(struct fwnode_handle *node, unsigned long *hartid)
+{
+ int rc;
+ u64 temp;
+
+ if (!is_of_node(node)) {
+ rc = fwnode_property_read_u64_array(node, "hartid", &temp, 1);
+ if (!rc)
+ *hartid = temp;
+ } else
+ rc = riscv_of_parent_hartid(to_of_node(node), hartid);
+
+ return rc;
+}
+
DEFINE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo);
unsigned long riscv_cached_mvendorid(unsigned int cpu_id)
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 4adeee1bc391..65f4a2afb381 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -143,7 +143,7 @@ static int __init riscv_intc_init(struct device_node *node,
int rc;
unsigned long hartid;
- rc = riscv_of_parent_hartid(node, &hartid);
+ rc = riscv_get_intc_hartid(of_fwnode_handle(node), &hartid);
if (rc < 0) {
pr_warn("unable to find hart id for %pOF\n", node);
return 0;
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index e1484905b7bd..56b0544b1f27 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -477,7 +477,8 @@ static int __init __plic_init(struct device_node *node,
continue;
}
- error = riscv_of_parent_hartid(parent.np, &hartid);
+ error = riscv_get_intc_hartid(of_fwnode_handle(parent.np),
+ &hartid);
if (error < 0) {
pr_warn("failed to parse hart ID for context %d.\n", i);
continue;
--
2.34.1
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next prev parent reply other threads:[~2023-07-19 11:36 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-19 11:35 [PATCH v6 00/14] Linux RISC-V AIA Support Anup Patel
2023-07-19 11:35 ` Anup Patel [this message]
2023-07-19 11:35 ` [PATCH v6 02/14] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-07-19 22:25 ` Saravana Kannan
2023-07-20 5:21 ` Anup Patel
2023-07-19 22:37 ` Rob Herring
2023-07-20 11:55 ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 03/14] drivers: irqchip/riscv-intc: Mark all INTC nodes as initialized Anup Patel
2023-07-19 22:14 ` Saravana Kannan
2023-07-20 5:21 ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 04/14] irqchip/sifive-plic: Use platform driver probing for PLIC Anup Patel
2023-07-27 8:41 ` Sunil V L
2023-08-02 12:25 ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 05/14] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-07-19 11:35 ` [PATCH v6 06/14] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-07-19 11:35 ` [PATCH v6 07/14] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-07-19 11:35 ` [PATCH v6 08/14] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-07-19 11:35 ` [PATCH v6 09/14] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-07-19 11:35 ` [PATCH v6 10/14] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-07-19 11:35 ` [PATCH v6 11/14] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-07-19 11:35 ` [PATCH v6 12/14] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-07-19 11:35 ` [PATCH v6 13/14] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-07-19 11:35 ` [PATCH v6 14/14] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
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