From: Conor Dooley <conor@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>,
Fu Wei <wefu@redhat.com>, Chen Wang <unicorn_wang@outlook.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v3 4/6] riscv: dts: renesas: convert isa detection to new properties
Date: Mon, 9 Oct 2023 17:16:00 +0100 [thread overview]
Message-ID: <20231009-underpass-decorator-12e153d8f8e7@spud> (raw)
In-Reply-To: <CAMuHMdVc7VOvB86A7-TShhoqut6Y1ZvY0WSC8XpOEv8Bb2bA-Q@mail.gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 1997 bytes --]
On Mon, Oct 09, 2023 at 02:15:47PM +0200, Geert Uytterhoeven wrote:
> Hi Conor,
>
> On Mon, Oct 9, 2023 at 11:44 AM Conor Dooley <conor.dooley@microchip.com> wrote:
> > Convert the RZ/Five devicetrees to use the new properties
> > "riscv,isa-base" & "riscv,isa-extensions".
> > For compatibility with other projects, "riscv,isa" remains.
> >
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>
> Thanks for your patch!
>
> > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > @@ -24,6 +24,9 @@ cpu0: cpu@0 {
> > reg = <0x0>;
> > status = "okay";
> > riscv,isa = "rv64imafdc";
> > + riscv,isa-base = "rv64i";
> > + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> > + "zifencei", "zihpm";
>
> LGMT, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> I could not review the "zi*" parts, as the documentation that I have
> does not mention these.
These are effectively the assumptions that the kernel already makes, for
things that used to be part of the base isa (or were assumed to be) that
are now extensions in their own right.
The Zihpm it'd be good if someone from the Renesas or Andes sides could
confirm though.
Cheers,
Conor.
>
> > mmu-type = "riscv,sv39";
> > i-cache-size = <0x8000>;
> > i-cache-line-size = <0x40>;
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-10-09 16:16 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-09 9:37 [PATCH v3 0/6] riscv,isa-extensions additions Conor Dooley
2023-10-09 9:37 ` [PATCH v3 1/6] riscv: dts: microchip: convert isa detection to new properties Conor Dooley
2023-10-09 9:37 ` [PATCH v3 2/6] riscv: dts: sifive: " Conor Dooley
2023-10-09 9:37 ` [PATCH v3 3/6] riscv: dts: starfive: " Conor Dooley
2023-10-09 9:37 ` [PATCH v3 4/6] riscv: dts: renesas: " Conor Dooley
2023-10-09 12:15 ` Geert Uytterhoeven
2023-10-09 16:16 ` Conor Dooley [this message]
2023-10-16 6:09 ` Yu-Chien Peter Lin
2023-10-16 7:17 ` Geert Uytterhoeven
2023-10-09 9:37 ` [PATCH v3 5/6] riscv: dts: allwinner: " Conor Dooley
2023-10-13 19:22 ` Jernej Škrabec
2023-10-09 9:37 ` [PATCH v3 6/6] riscv: dts: thead: " Conor Dooley
2023-10-15 12:22 ` (subset) [PATCH v3 0/6] riscv,isa-extensions additions Conor Dooley
2023-10-16 7:23 ` Geert Uytterhoeven
2023-10-16 8:09 ` Conor Dooley
2023-11-12 0:55 ` patchwork-bot+linux-riscv
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231009-underpass-decorator-12e153d8f8e7@spud \
--to=conor@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=geert+renesas@glider.be \
--cc=geert@linux-m68k.org \
--cc=guoren@kernel.org \
--cc=jernej.skrabec@gmail.com \
--cc=jszhang@kernel.org \
--cc=kernel@esmil.dk \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=magnus.damm@gmail.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=samuel@sholland.org \
--cc=unicorn_wang@outlook.com \
--cc=wefu@redhat.com \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).