* [PATCH] riscv: Add HAVE_IRQ_TIME_ACCOUNTING
@ 2020-10-28 4:28 Kefeng Wang
2020-11-12 8:56 ` Kefeng Wang
0 siblings, 1 reply; 3+ messages in thread
From: Kefeng Wang @ 2020-10-28 4:28 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Jonathan Corbet, linux-riscv
Cc: Kefeng Wang
RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
Documentation/features/time/irq-time-acct/arch-support.txt | 2 +-
arch/riscv/Kconfig | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt
index d9082b91f10e..6fc03deb1c38 100644
--- a/Documentation/features/time/irq-time-acct/arch-support.txt
+++ b/Documentation/features/time/irq-time-acct/arch-support.txt
@@ -23,7 +23,7 @@
| openrisc: | TODO |
| parisc: | .. |
| powerpc: | ok |
- | riscv: | TODO |
+ | riscv: | ok |
| s390: | .. |
| sh: | TODO |
| sparc: | .. |
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 44377fd7860e..dfbc1351ee62 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -68,6 +68,7 @@ config RISCV
select HAVE_FUTEX_CMPXCHG if FUTEX
select HAVE_GCC_PLUGINS
select HAVE_GENERIC_VDSO if MMU && 64BIT
+ select HAVE_IRQ_TIME_ACCOUNTING
select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS
--
2.26.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] riscv: Add HAVE_IRQ_TIME_ACCOUNTING
2020-10-28 4:28 [PATCH] riscv: Add HAVE_IRQ_TIME_ACCOUNTING Kefeng Wang
@ 2020-11-12 8:56 ` Kefeng Wang
2020-11-21 2:03 ` Palmer Dabbelt
0 siblings, 1 reply; 3+ messages in thread
From: Kefeng Wang @ 2020-11-12 8:56 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Jonathan Corbet, linux-riscv
Any comments, kindly ping...
On 2020/10/28 12:28, Kefeng Wang wrote:
> RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
> provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> ---
> Documentation/features/time/irq-time-acct/arch-support.txt | 2 +-
> arch/riscv/Kconfig | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt
> index d9082b91f10e..6fc03deb1c38 100644
> --- a/Documentation/features/time/irq-time-acct/arch-support.txt
> +++ b/Documentation/features/time/irq-time-acct/arch-support.txt
> @@ -23,7 +23,7 @@
> | openrisc: | TODO |
> | parisc: | .. |
> | powerpc: | ok |
> - | riscv: | TODO |
> + | riscv: | ok |
> | s390: | .. |
> | sh: | TODO |
> | sparc: | .. |
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 44377fd7860e..dfbc1351ee62 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -68,6 +68,7 @@ config RISCV
> select HAVE_FUTEX_CMPXCHG if FUTEX
> select HAVE_GCC_PLUGINS
> select HAVE_GENERIC_VDSO if MMU && 64BIT
> + select HAVE_IRQ_TIME_ACCOUNTING
> select HAVE_PCI
> select HAVE_PERF_EVENTS
> select HAVE_PERF_REGS
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] riscv: Add HAVE_IRQ_TIME_ACCOUNTING
2020-11-12 8:56 ` Kefeng Wang
@ 2020-11-21 2:03 ` Palmer Dabbelt
0 siblings, 0 replies; 3+ messages in thread
From: Palmer Dabbelt @ 2020-11-21 2:03 UTC (permalink / raw)
To: wangkefeng.wang; +Cc: corbet, linux-riscv, aou, Paul Walmsley
On Thu, 12 Nov 2020 00:56:13 PST (-0800), wangkefeng.wang@huawei.com wrote:
> Any comments, kindly ping...
I guess I missed this one too. It's now on for-next as well. Thanks!
>
> On 2020/10/28 12:28, Kefeng Wang wrote:
>> RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
>> provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.
>>
>> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
>> ---
>> Documentation/features/time/irq-time-acct/arch-support.txt | 2 +-
>> arch/riscv/Kconfig | 1 +
>> 2 files changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt
>> index d9082b91f10e..6fc03deb1c38 100644
>> --- a/Documentation/features/time/irq-time-acct/arch-support.txt
>> +++ b/Documentation/features/time/irq-time-acct/arch-support.txt
>> @@ -23,7 +23,7 @@
>> | openrisc: | TODO |
>> | parisc: | .. |
>> | powerpc: | ok |
>> - | riscv: | TODO |
>> + | riscv: | ok |
>> | s390: | .. |
>> | sh: | TODO |
>> | sparc: | .. |
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index 44377fd7860e..dfbc1351ee62 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -68,6 +68,7 @@ config RISCV
>> select HAVE_FUTEX_CMPXCHG if FUTEX
>> select HAVE_GCC_PLUGINS
>> select HAVE_GENERIC_VDSO if MMU && 64BIT
>> + select HAVE_IRQ_TIME_ACCOUNTING
>> select HAVE_PCI
>> select HAVE_PERF_EVENTS
>> select HAVE_PERF_REGS
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-11-21 2:03 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-28 4:28 [PATCH] riscv: Add HAVE_IRQ_TIME_ACCOUNTING Kefeng Wang
2020-11-12 8:56 ` Kefeng Wang
2020-11-21 2:03 ` Palmer Dabbelt
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).