From: Anup Patel <anup@brainfault.org>
To: Zong Li <zong.li@sifive.com>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>
Subject: Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V
Date: Mon, 29 Jun 2020 10:22:55 +0530 [thread overview]
Message-ID: <CAAhSdy1uFt3rqf8cSHqS=W90AoeQjo10R_Ak4Cknb_QUvH1SPQ@mail.gmail.com> (raw)
In-Reply-To: <cover.1593397455.git.zong.li@sifive.com>
On Mon, Jun 29, 2020 at 8:49 AM Zong Li <zong.li@sifive.com> wrote:
>
> This patch set adds raw event support on RISC-V. In addition, we
> introduce the DT mechanism to make our perf more generic and common.
>
> Currently, we set the hardware events by writing the mhpmeventN CSRs, it
> would raise an illegal instruction exception and trap into m-mode to
> emulate event selector CSRs access. It doesn't make sense because we
> shouldn't write the m-mode CSRs in s-mode. Ideally, we should set event
> selector through standard SBI call or the shadow CSRs of s-mode. We have
> prepared a proposal of a new SBI extension, called "PMU SBI extension",
> but we also discussing the feasibility of accessing these PMU CSRs on
> s-mode at the same time, such as delegation mechanism, so I was
> wondering if we could use SBI calls first and make the PMU SBI extension
> as legacy when s-mode access mechanism is accepted by Foundation? or
> keep the current situation to see what would happen in the future.
>
> This patch set also introduces the DT mechanism, we don't want to add too
> much platform-dependency code in perf like other architectures, so we
> put the mapping of generic hardware events to DT, then we can easy to
> transfer generic hardware events to vendor's own hardware events without
> any platfrom-dependency stuff in our perf.
Please re-write this series to have RISC-V PMU driver as a regular
platform driver as drivers/perf/riscv_pmu.c.
The PMU related sources will have to be removed from arch/riscv.
Based on implementation of final drivers/perf/riscv_pmu.c we will
come-up with drivers/perf/riscv_sbi_pmu.c driver for SBI perf counters.
Regards,
Anup
>
> Zong Li (6):
> dt-bindings: riscv: Add YAML documentation for PMU
> riscv: dts: sifive: Add DT support for PMU
> riscv: add definition of hpmcounter CSRs
> riscv: perf: Add raw event support
> riscv: perf: introduce DT mechanism
> riscv: remove PMU menu of Kconfig
>
> .../devicetree/bindings/riscv/pmu.yaml | 59 +++
> arch/riscv/Kconfig | 13 -
> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 13 +
> arch/riscv/include/asm/csr.h | 58 +++
> arch/riscv/include/asm/perf_event.h | 100 ++--
> arch/riscv/kernel/Makefile | 2 +-
> arch/riscv/kernel/perf_event.c | 471 +++++++++++-------
> 7 files changed, 471 insertions(+), 245 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/riscv/pmu.yaml
>
> --
> 2.27.0
>
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next prev parent reply other threads:[~2020-06-29 4:53 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-29 3:19 [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V Zong Li
2020-06-29 3:19 ` [RFC PATCH 1/6] dt-bindings: riscv: Add YAML documentation for PMU Zong Li
2020-06-29 4:09 ` Anup Patel
2020-06-29 4:28 ` Zong Li
2020-06-29 4:37 ` Anup Patel
2020-06-29 6:35 ` Zong Li
2020-06-29 8:31 ` Anup Patel
2020-07-01 3:22 ` Zong Li
2020-06-29 3:19 ` [RFC PATCH 2/6] riscv: dts: sifive: Add DT support " Zong Li
2020-06-29 3:19 ` [RFC PATCH 3/6] riscv: add definition of hpmcounter CSRs Zong Li
2020-06-29 3:19 ` [RFC PATCH 4/6] riscv: perf: Add raw event support Zong Li
2020-06-29 4:17 ` Anup Patel
2020-06-29 4:35 ` Zong Li
2020-06-29 4:40 ` Anup Patel
2020-06-29 3:19 ` [RFC PATCH 5/6] riscv: perf: introduce DT mechanism Zong Li
2020-06-29 4:36 ` Anup Patel
2020-06-29 6:26 ` Zong Li
2020-06-29 3:19 ` [RFC PATCH 6/6] riscv: remove PMU menu of Kconfig Zong Li
2020-06-29 4:52 ` Anup Patel [this message]
2020-06-29 5:52 ` [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V Zong Li
2020-06-29 8:27 ` Anup Patel
2020-06-29 12:53 ` Zong Li
2020-06-29 13:23 ` Anup Patel
2020-06-30 6:37 ` Zong Li
2020-06-30 7:39 ` Anup Patel
2020-06-30 8:04 ` Zong Li
2020-06-30 10:18 ` Anup Patel
2020-06-30 11:38 ` Anup Patel
2020-06-30 18:57 ` Atish Patra
2020-07-01 2:14 ` Zong Li
2020-07-01 11:43 ` Anup Patel
2020-07-01 2:11 ` Zong Li
2020-07-01 1:55 ` Zong Li
2020-07-01 0:51 ` Alan Kao
2020-07-01 1:02 ` Atish Patra
2020-07-01 2:45 ` Alan Kao
2020-07-01 3:15 ` Zong Li
2020-07-01 4:13 ` Anup Patel
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