From: Greentime Hu <green.hu@gmail.com>
To: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Damien Le Moal <damien.lemoal@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
Christoph Hellwig <hch@lst.de>,
linux-riscv@lists.infradead.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: RISC-V nommu support v6
Date: Wed, 11 Dec 2019 16:42:33 +0800 [thread overview]
Message-ID: <CAEbi=3e4dzDex=zU2Bwvi+b=Jwz2NsT4fZPcT_o8umnJaub3Mg@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1911221817010.14532@viisi.sifive.com>
Paul Walmsley <paul.walmsley@sifive.com> 於 2019年11月23日 週六 上午10:24寫道:
>
> On Thu, 31 Oct 2019, Christoph Hellwig wrote:
>
> > On Wed, Oct 30, 2019 at 01:21:21PM -0700, Paul Walmsley wrote:
> > > I tried building this series from your git branch mentioned above, and
> > > booted it with a buildroot userspace built from your custom buildroot
> > > tree. Am seeing some segmentation faults from userspace (below).
> > >
> > > Am still planning to merge your patches.
> > >
> > > But I'm wondering whether you are seeing these segmentation faults also?
> > > Or is it something that might be specific to my test setup?
> >
> > I just built a fresh image using make -j4 with that report and it works
> > perfectly fine with my tree.
>
> Another colleague just gave this a quick test, following your instructions
> as I did. He encountered the same segmentation faulting issue. Might be
> worth taking a look at this once v5.5-rc1 is released. Could be a
> userspace issue, though.
Hi Christoph,
I think it should be replaced with this macro for cores without S-mode.
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 9bca97ffb67a..5c8b24bf4e4e 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -248,7 +248,7 @@ ENTRY(reset_regs)
li t4, 0
li t5, 0
li t6, 0
- csrw sscratch, 0
+ csrw CSR_SCRATCH, 0
#ifdef CONFIG_FPU
csrr t0, CSR_MISA
next prev parent reply other threads:[~2019-12-11 8:43 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-28 12:10 RISC-V nommu support v6 Christoph Hellwig
2019-10-28 12:10 ` [PATCH 01/12] riscv: abstract out CSR names for supervisor vs machine mode Christoph Hellwig
2019-11-05 17:56 ` Paul Walmsley
2019-11-05 17:57 ` Paul Walmsley
2019-11-05 18:02 ` Marc Zyngier
2019-11-12 10:38 ` Thomas Gleixner
2019-11-14 7:30 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 02/12] riscv: don't allow selecting SBI based drivers for M-mode Christoph Hellwig
2019-11-14 7:31 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 03/12] riscv: poison SBI calls " Christoph Hellwig
2019-10-31 23:55 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 04/12] riscv: cleanup the default power off implementation Christoph Hellwig
2019-10-31 20:49 ` Paul Walmsley
2019-10-31 23:56 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 05/12] riscv: implement remote sfence.i using IPIs Christoph Hellwig
2019-10-31 23:57 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 06/12] riscv: add support for MMIO access to the timer registers Christoph Hellwig
2019-11-05 18:01 ` Paul Walmsley
2019-11-12 10:39 ` Thomas Gleixner
2019-11-17 23:06 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 07/12] riscv: provide native clint access for M-mode Christoph Hellwig
2019-10-28 12:10 ` [PATCH 08/12] riscv: read the hart ID from mhartid on boot Christoph Hellwig
2019-10-28 12:10 ` [PATCH 09/12] riscv: clear the instruction cache and all registers when booting Christoph Hellwig
2019-11-14 7:45 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 10/12] riscv: add nommu support Christoph Hellwig
2019-11-17 23:13 ` Paul Walmsley
2019-12-16 22:03 ` David Abdurachmanov
2019-12-17 3:18 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 11/12] riscv: provide a flat image loader Christoph Hellwig
2019-11-17 23:14 ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 12/12] riscv: disable the EFI PECOFF header for M-mode Christoph Hellwig
2019-10-30 20:21 ` RISC-V nommu support v6 Paul Walmsley
2019-10-31 15:52 ` Christoph Hellwig
2019-10-31 20:13 ` Paul Walmsley
2019-11-23 2:19 ` Paul Walmsley
2019-12-11 8:42 ` Greentime Hu [this message]
2020-02-12 12:19 ` Greentime Hu
2019-11-11 9:47 ` Christoph Hellwig
2019-11-11 17:02 ` Paul Walmsley
2019-11-13 13:18 ` Christoph Hellwig
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