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From: William Qiu <william.qiu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Ziv Xu <ziv.xu@starfivetech.com>
Subject: Re: [PATCH v3 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
Date: Wed, 21 Jun 2023 14:45:11 +0800	[thread overview]
Message-ID: <fb608232-f44d-21cf-7e0e-28829196e677@starfivetech.com> (raw)
In-Reply-To: <4937f9c4-a0e0-fd37-d71b-e7488b2a1062@linaro.org>



On 2023/6/19 20:17, Krzysztof Kozlowski wrote:
> On 19/06/2023 10:35, William Qiu wrote:
>> The QSPI controller needs three clock items to work properly on StarFive
>> JH7110 SoC, so there is need to change the maxItems's value to 3. Other
>> platforms do not have this constraint.
>> 
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
>> Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
>> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
>>  .../bindings/spi/cdns,qspi-nor.yaml           | 20 ++++++++++++++++++-
>>  1 file changed, 19 insertions(+), 1 deletion(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
>> index b310069762dd..1b83cbb9a086 100644
>> --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
>> +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
>> @@ -26,6 +26,15 @@ allOf:
>>              const: starfive,jh7110-qspi
>>      then:
>>        properties:
>> +        clocks:
>> +          maxItems: 3
>> +
>> +        clock-names:
>> +          items:
>> +            - const: ref
>> +            - const: ahb
>> +            - const: apb
> 
> You are duplicating top-level property. Define the items only in one
> place. If this list is applicable to everything, then in top-level property.
> 
Only in JH7110 SoC need there clocks, other platforms do not have this constraint.
So I need to duplicating top-level property.
>> +
>>          resets:
>>            minItems: 2
>>            maxItems: 3
>> @@ -38,6 +47,9 @@ allOf:
>>  
>>      else:
>>        properties:
>> +        clocks:
>> +          maxItems: 1
> 
> clock-names is missing. They must be in sync with clocks. What is the
> first clock?
> 
But there are no clock-names before, should I add it?
>> +
>>          resets:
>>            maxItems: 2
>>  
>> @@ -70,7 +82,13 @@ properties:
>>      maxItems: 1
>>  
>>    clocks:
>> -    maxItems: 1
>> +    maxItems: 3
> 
> 
> You did not test it before sending. minItems is missing.
> 
I will add it.
As for other platforms, should I use enum to constraint the clocks?
>> +
>> +  clock-names:
>> +    items:
>> +      - const: ref
>> +      - const: ahb
>> +      - const: apb
> 
> 
>>  
>>    cdns,fifo-depth:
>>      description:
> 
> Best regards,
> Krzysztof
> 
Thanks for taking time to review this patches series.

Best regards,
William

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  reply	other threads:[~2023-06-21  6:45 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-19  8:35 [PATCH v3 0/3] Add initialization of clock for StarFive JH7110 SoC William Qiu
2023-06-19  8:35 ` [PATCH v3 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu
2023-06-19  9:16   ` Rob Herring
2023-06-21  6:16     ` William Qiu
2023-06-19 12:17   ` Krzysztof Kozlowski
2023-06-21  6:45     ` William Qiu [this message]
2023-06-21  8:10       ` Krzysztof Kozlowski
2023-06-27  7:53         ` William Qiu
2023-06-19  8:35 ` [PATCH v3 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
2023-06-19  8:35 ` [PATCH v3 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu
2023-06-19 12:20   ` Krzysztof Kozlowski
2023-06-21  6:04     ` William Qiu

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