From: Palmer Dabbelt <palmerdabbelt@google.com>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: aou@eecs.berkeley.edu, anup@brainfault.org,
atishp@atishpatra.org, linux-kernel@vger.kernel.org,
rppt@linux.ibm.com, Atish Patra <Atish.Patra@wdc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-riscv@lists.infradead.org, tglx@linutronix.de
Subject: Re: [PATCH v6 3/5] RISC-V: Add SBI v0.2 extension definitions
Date: Wed, 15 Jan 2020 12:34:40 -0800 (PST) [thread overview]
Message-ID: <mhng-5b413aea-2c8d-4bb9-ba38-ac523278c4f4@palmerdabbelt-glaptop> (raw)
In-Reply-To: <20191218213918.16676-4-atish.patra@wdc.com>
On Wed, 18 Dec 2019 13:39:16 PST (-0800), Atish Patra wrote:
> Few v0.1 SBI calls are being replaced by new SBI calls that follows
> v0.2 calling convention.
>
> This patch just defines these new extensions.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/include/asm/sbi.h | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 1aeb4bb7baa8..9612133213ba 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -21,6 +21,9 @@ enum sbi_ext_id {
> SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> SBI_EXT_0_1_SHUTDOWN = 0x8,
> SBI_EXT_BASE = 0x10,
> + SBI_EXT_TIME = 0x54494D45,
> + SBI_EXT_IPI = 0x735049,
> + SBI_EXT_RFENCE = 0x52464E43,
> };
>
> enum sbi_ext_base_fid {
> @@ -33,6 +36,24 @@ enum sbi_ext_base_fid {
> SBI_EXT_BASE_GET_MIMPID,
> };
>
> +enum sbi_ext_time_fid {
> + SBI_EXT_TIME_SET_TIMER = 0,
> +};
> +
> +enum sbi_ext_ipi_fid {
> + SBI_EXT_IPI_SEND_IPI = 0,
> +};
> +
> +enum sbi_ext_rfence_fid {
> + SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
> + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> +};
> +
> #define SBI_SPEC_VERSION_DEFAULT 0x1
> #define SBI_SPEC_VERSION_MAJOR_SHIFT 24
> #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
With or without SBI_EXT_RFENCE_*, depending on what we do with the spec:
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
next prev parent reply other threads:[~2020-01-15 20:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-18 21:39 [PATCH v6 0/5] Add support for SBI v0.2 Atish Patra
2019-12-18 21:39 ` [PATCH v6 1/5] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
2019-12-18 21:39 ` [PATCH v6 2/5] RISC-V: Add basic support for SBI v0.2 Atish Patra
2019-12-18 21:39 ` [PATCH v6 3/5] RISC-V: Add SBI v0.2 extension definitions Atish Patra
2019-12-19 6:55 ` Anup Patel
2019-12-18 21:39 ` [PATCH v6 4/5] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
2019-12-18 21:39 ` [PATCH v6 5/5] RISC-V: Implement new SBI v0.2 extensions Atish Patra
2020-01-15 20:34 ` Palmer Dabbelt [this message]
2020-01-15 20:36 ` [PATCH v6 0/5] Add support for SBI v0.2 Palmer Dabbelt
2020-01-16 0:43 ` Anup Patel
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