From: Palmer Dabbelt <palmer@dabbelt.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: Conor Dooley <conor@kernel.org>,
prabhakar.csengg@gmail.com, Arnd Bergmann <arnd@arndb.de>,
Conor Dooley <conor.dooley@microchip.com>,
geert+renesas@glider.be, heiko@sntech.de, guoren@kernel.org,
ajones@ventanamicro.com, Paul Walmsley <paul.walmsley@sifive.com>,
aou@eecs.berkeley.edu, samuel@sholland.org,
linux-riscv@lists.infradead.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
biju.das.jz@bp.renesas.com,
prabhakar.mahadev-lad.rj@bp.renesas.com
Subject: Re: [PATCH v8 0/7] Add non-coherent DMA support for AX45MP
Date: Wed, 19 Apr 2023 08:59:03 -0700 (PDT) [thread overview]
Message-ID: <mhng-e296c86c-71b1-46f8-88c6-16eda3590a3d@palmer-ri-x1c9> (raw)
In-Reply-To: <ZDzs3eYIKPFcv0HQ@infradead.org>
On Sun, 16 Apr 2023 23:53:17 PDT (-0700), Christoph Hellwig wrote:
> On Wed, Apr 12, 2023 at 09:32:30PM +0100, Conor Dooley wrote:
>> On Wed, Apr 12, 2023 at 12:08:53PM +0100, Prabhakar wrote:
>>
>> > Note,
>> > - This series requires testing on Cores with zicbom and T-Head SoCs
>>
>> As I said last time, I dunno what actual Zicbom stuff exists, other than
>> perhaps the Ventana lads having something. I did some tyre kicking on my
>> D1 and it was fine, although nothing has actually changed materially for
>> either of them with this series in v8..
>
> And as saying before, there is absolutely no reason to add non-standard
> non-coherent DMA support and let this cancer creep. If you want Linux
> support implement Zicbom, be that in hardware or the SBI.
IMO we should just take the support in Linux: trying to hide stuff behind the
SBI leads to more more headaches than it's worth, we end up with a bunch of
broken firmware to try and work around. We've already got a mess here because
of the D1 support, we might as well just live with it.
In practice there's just going to be a ton of mess in arch/riscv, as the ISA
has been missing many core features for many years and hardware vendors are
allowed to do whatever they want. That's obviously a huge headache, but I
think there's nothing we can really do about it.
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next prev parent reply other threads:[~2023-04-19 15:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-12 11:08 [PATCH v8 0/7] Add non-coherent DMA support for AX45MP Prabhakar
2023-04-12 11:08 ` [PATCH v8 1/7] riscv: asm: alternative-macros: Introduce ALTERNATIVE_3() macro Prabhakar
2023-04-12 11:08 ` [PATCH v8 2/7] riscv: asm: vendorid_list: Add Andes Technology to the vendors list Prabhakar
2023-04-17 8:52 ` Geert Uytterhoeven
2023-04-12 11:08 ` [PATCH v8 3/7] riscv: errata: Add Andes alternative ports Prabhakar
2023-04-12 11:08 ` [PATCH v8 4/7] dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller Prabhakar
2023-04-12 11:08 ` [PATCH v8 5/7] cache: Add L2 cache management for Andes AX45MP RISC-V core Prabhakar
2023-04-12 20:25 ` Conor Dooley
2023-04-13 7:06 ` Conor Dooley
2023-04-13 18:26 ` Lad, Prabhakar
2023-04-13 18:46 ` Conor Dooley
2023-04-13 21:06 ` Lad, Prabhakar
2023-04-14 18:59 ` Lad, Prabhakar
2023-04-12 11:08 ` [PATCH v8 6/7] riscv: errata: Hookup the Andes AX45MP non-coherent handling Prabhakar
2023-04-12 20:29 ` Conor Dooley
2023-04-12 11:09 ` [PATCH v8 7/7] soc: renesas: Kconfig: Select the required configs for RZ/Five SoC Prabhakar
2023-04-12 20:32 ` [PATCH v8 0/7] Add non-coherent DMA support for AX45MP Conor Dooley
2023-04-17 6:53 ` Christoph Hellwig
2023-04-19 15:59 ` Palmer Dabbelt [this message]
2023-04-20 6:09 ` Christoph Hellwig
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