From: Matthias Kaehlcke <mka@chromium.org>
To: Akash Asthana <akashast@codeaurora.org>
Cc: gregkh@linuxfoundation.org, agross@kernel.org,
bjorn.andersson@linaro.org, wsa@the-dreams.de,
broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
georgi.djakov@linaro.org, linux-i2c@vger.kernel.org,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
swboyd@chromium.org, mgautam@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org,
dianders@chromium.org, evgreen@chromium.org
Subject: Re: [PATCH V3 3/8] soc: qcom-geni-se: Add interconnect support to fix earlycon crash
Date: Tue, 31 Mar 2020 11:24:57 -0700 [thread overview]
Message-ID: <20200331182457.GH199755@google.com> (raw)
In-Reply-To: <1585652976-17481-4-git-send-email-akashast@codeaurora.org>
Hi Akash,
On Tue, Mar 31, 2020 at 04:39:31PM +0530, Akash Asthana wrote:
> QUP core clock is shared among all the SE drivers present on particular
> QUP wrapper, the system will reset(unclocked access) if earlycon used after
> QUP core clock is put to 0 from other SE drivers before real console comes
> up.
>
> As earlycon can't vote for it's QUP core need, to fix this add ICC
> support to common/QUP wrapper driver and put vote for QUP core from
> probe on behalf of earlycon and remove vote during earlycon exit call.
>
> Signed-off-by: Akash Asthana <akashast@codeaurora.org>
> Reported-by: Matthias Kaehlcke <mka@chromium.org>
> ---
> Change is V3:
> - Add geni_remove_earlycon_icc_vote API that will be used by earlycon
> exit function to remove ICC vote for earlyconsole.
> - Remove suspend/resume hook for geni-se driver as we are no longer
> removing earlyconsole ICC vote from system suspend, we are removing
> from earlycon exit.
>
> drivers/soc/qcom/qcom-geni-se.c | 51 +++++++++++++++++++++++++++++++++++
> drivers/tty/serial/qcom_geni_serial.c | 7 +++++
> include/linux/qcom-geni-se.h | 2 ++
> 3 files changed, 60 insertions(+)
>
> diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
> index 9344c14..d30c282 100644
> --- a/drivers/soc/qcom/qcom-geni-se.c
> +++ b/drivers/soc/qcom/qcom-geni-se.c
> @@ -90,8 +90,11 @@ struct geni_wrapper {
> struct device *dev;
> void __iomem *base;
> struct clk_bulk_data ahb_clks[NUM_AHB_CLKS];
> + struct geni_icc_path to_core;
> };
>
> +struct geni_wrapper *earlycon_wrapper;
should be static
> +
> #define QUP_HW_VER_REG 0x4
>
> /* Common SE registers */
> @@ -818,6 +821,26 @@ int geni_icc_vote_off(struct geni_se *se)
> }
> EXPORT_SYMBOL(geni_icc_vote_off);
>
> +void geni_remove_earlycon_icc_vote(void)
> +{
> + struct geni_wrapper *wrapper = earlycon_wrapper;
> + struct device_node *parent = of_get_next_parent(wrapper->dev->of_node);
> + struct device_node *child;
> +
> + for_each_child_of_node(parent, child) {
> + if (of_device_is_compatible(child, "qcom,geni-se-qup")) {
> + wrapper = platform_get_drvdata(of_find_device_by_node(
> + child));
> + icc_put(wrapper->to_core.path);
> + wrapper->to_core.path = NULL;
> + }
> + }
> + of_node_put(parent);
> +
> + earlycon_wrapper = NULL;
> +}
> +EXPORT_SYMBOL(geni_remove_earlycon_icc_vote);
I didn't know that consoles have an exit handler, this is way nicer than
the miscellaneous triggers we discussed earlier :)
> +
> static int geni_se_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> @@ -845,6 +868,34 @@ static int geni_se_probe(struct platform_device *pdev)
> }
> }
>
> +#ifdef CONFIG_SERIAL_EARLYCON
> + wrapper->to_core.path = devm_of_icc_get(dev, "qup-core");
> + if (IS_ERR(wrapper->to_core.path))
> + return PTR_ERR(wrapper->to_core.path);
> + /*
> + * Put minmal BW request on core clocks on behalf of early console.
> + * The vote will be removed earlycon exit function.
> + *
> + * Note: We are putting vote on each QUP wrapper instead only to which
> + * earlycon is connected because QUP core clock of different wrapper
> + * share same voltage domain. If core1 is put to 0, then core2 will
> + * also run at 0, if not voted. Default ICC vote will be removed ASA
> + * we touch any of the core clock.
> + * core1 = core2 = max(core1, core2)
> + */
I don't really understand this part. According to the comment if we vote
(let's say) for core2 but not for core1 then:
core1: 0
core2: GENI_DEFAULT_BW
core1 = core2 = max(core1, core2)
or
core1 = core2 = max(0, GENI_DEFAULT_BW)
hence
core1 = core2 = GENI_DEFAULT_BW
What am I missing, why is it necessary to vote for both/all?
next prev parent reply other threads:[~2020-03-31 18:25 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-31 11:09 [PATCH V3 0/8] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-03-31 11:09 ` [PATCH V3 1/8] interconnect: Add devm_of_icc_get() as exported API for users Akash Asthana
2020-03-31 11:09 ` [PATCH V3 2/8] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-03-31 17:52 ` Matthias Kaehlcke
2020-04-02 13:46 ` Akash Asthana
2020-03-31 23:32 ` Bjorn Andersson
2020-04-01 16:26 ` Evan Green
2020-04-07 6:46 ` Akash Asthana
2020-04-07 9:58 ` Georgi Djakov
2020-04-08 11:13 ` Akash Asthana
2020-04-07 6:45 ` Akash Asthana
2020-04-07 22:07 ` Bjorn Andersson
2020-03-31 11:09 ` [PATCH V3 3/8] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-03-31 18:24 ` Matthias Kaehlcke [this message]
2020-04-01 19:46 ` Matthias Kaehlcke
2020-04-07 6:52 ` Akash Asthana
2020-04-07 11:34 ` Akash Asthana
2020-04-07 17:26 ` Matthias Kaehlcke
2020-04-08 11:38 ` Akash Asthana
2020-04-08 17:09 ` Matthias Kaehlcke
2020-03-31 11:09 ` [PATCH V3 4/8] i2c: i2c-qcom-geni: Add interconnect support Akash Asthana
2020-03-31 18:49 ` Matthias Kaehlcke
2020-04-07 7:04 ` Akash Asthana
2020-03-31 11:09 ` [PATCH V3 5/8] spi: spi-geni-qcom: " Akash Asthana
2020-03-31 19:02 ` Matthias Kaehlcke
2020-04-07 7:11 ` Akash Asthana
2020-03-31 11:09 ` [PATCH V3 6/8] tty: serial: qcom_geni_serial: " Akash Asthana
2020-03-31 19:39 ` Matthias Kaehlcke
2020-04-07 9:19 ` Akash Asthana
2020-04-07 9:40 ` Akash Asthana
2020-03-31 11:09 ` [PATCH V3 7/8] spi: spi-qcom-qspi: " Akash Asthana
2020-03-31 11:23 ` Mark Brown
2020-04-07 9:54 ` Akash Asthana
2020-04-07 10:55 ` Mark Brown
2020-04-08 12:17 ` Akash Asthana
2020-04-09 13:17 ` Georgi Djakov
2020-04-09 13:20 ` Mark Brown
2020-04-15 10:34 ` Georgi Djakov
[not found] ` <eca0e6a7-effe-022c-e90e-c0672991251d@codeaurora.org>
2020-04-15 10:54 ` Georgi Djakov
2020-03-31 19:45 ` Matthias Kaehlcke
2020-03-31 11:09 ` [PATCH V3 8/8] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana
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