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From: Akash Asthana <akashast@codeaurora.org>
To: Matthias Kaehlcke <mka@chromium.org>
Cc: gregkh@linuxfoundation.org, agross@kernel.org,
	bjorn.andersson@linaro.org, wsa@the-dreams.de,
	broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
	georgi.djakov@linaro.org, linux-i2c@vger.kernel.org,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	swboyd@chromium.org, mgautam@codeaurora.org,
	linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org,
	dianders@chromium.org, evgreen@chromium.org
Subject: Re: [PATCH V3 2/8] soc: qcom: geni: Support for ICC voting
Date: Thu, 2 Apr 2020 19:16:29 +0530	[thread overview]
Message-ID: <759e50d2-7938-75b6-ee0b-a9ea3722ea54@codeaurora.org> (raw)
In-Reply-To: <20200331175207.GG199755@google.com>

Hi Matthias,

On 3/31/2020 11:22 PM, Matthias Kaehlcke wrote:
> Hi Akash,
>
> On Tue, Mar 31, 2020 at 04:39:30PM +0530, Akash Asthana wrote:
>> Add necessary macros and structure variables to support ICC BW
>> voting from individual SE drivers.
>>
>> Signed-off-by: Akash Asthana <akashast@codeaurora.org>
>> ---
>> Changes in V2:
>>   - As per Bjorn's comment dropped enums for ICC paths, given the three
>>     paths individual members
>>
>> Changes in V3:
>>   - Add geni_icc_get, geni_icc_vote_on and geni_icc_vote_off as helper API.
>>   - Add geni_icc_path structure in common header
>>
>>   drivers/soc/qcom/qcom-geni-se.c | 98 +++++++++++++++++++++++++++++++++++++++++
>>   include/linux/qcom-geni-se.h    | 36 +++++++++++++++
>>   2 files changed, 134 insertions(+)
>>
>> diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
>> index 7d622ea..9344c14 100644
>> --- a/drivers/soc/qcom/qcom-geni-se.c
>> +++ b/drivers/soc/qcom/qcom-geni-se.c
>> @@ -720,6 +720,104 @@ void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len)
>>   }
>>   EXPORT_SYMBOL(geni_se_rx_dma_unprep);
>>   
>> +int geni_icc_get(struct geni_se *se, const char *icc_core, const char *icc_cpu,
>> +		const char *icc_ddr)
>> +{
>> +	if (icc_core) {
>> +		se->to_core.path = devm_of_icc_get(se->dev, "qup-core");
>> +		if (IS_ERR(se->to_core.path))
>> +			return PTR_ERR(se->to_core.path);
>> +	}
>> +
>> +	if (icc_cpu) {
>> +		se->from_cpu.path = devm_of_icc_get(se->dev, "qup-config");
>> +		if (IS_ERR(se->from_cpu.path))
>> +			return PTR_ERR(se->from_cpu.path);
>> +	}
>> +
>> +	if (icc_ddr) {
>> +		se->to_ddr.path = devm_of_icc_get(se->dev, "qup-memory");
>> +		if (IS_ERR(se->to_ddr.path))
>> +			return PTR_ERR(se->to_ddr.path);
>> +	}
>> +
>> +	return 0;
>> +}
>> +EXPORT_SYMBOL(geni_icc_get);
>> +
>> +int geni_icc_vote_on(struct geni_se *se)
>> +{
>> +	int ret;
>> +
>> +	if (se->to_core.path) {
>> +		ret = icc_set_bw(se->to_core.path, se->to_core.avg_bw,
>> +			se->to_core.peak_bw);
>> +		if (ret) {
>> +			dev_err_ratelimited(se->dev, "%s: ICC BW voting failed for core\n",
>> +						__func__);
>> +			return ret;
>> +		}
>> +	}
>> +
>> +	if (se->from_cpu.path) {
>> +		ret = icc_set_bw(se->from_cpu.path, se->from_cpu.avg_bw,
>> +			se->from_cpu.peak_bw);
>> +		if (ret) {
>> +			dev_err_ratelimited(se->dev, "%s: ICC BW voting failed for cpu\n",
>> +						__func__);
>> +			return ret;
>> +		}
>> +	}
>> +
>> +	if (se->to_ddr.path) {
>> +		ret = icc_set_bw(se->to_ddr.path, se->to_ddr.avg_bw,
>> +			se->to_ddr.peak_bw);
>> +		if (ret) {
>> +			dev_err_ratelimited(se->dev, "%s: ICC BW voting failed for ddr\n",
>> +						__func__);
>> +			return ret;
>> +		}
>> +	}
>
> With an array of 'struct geni_icc_path' pointers the above could be
> reduced to:
>
> 	for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {
> 		if (!se->icc_paths[i])
> 			continue;
>
> 		ret = icc_set_bw(se->icc_paths[i]->path, se->icc_paths[i]->avg_bw,
> 			se->icc_paths[i]->peak_bw);
> 		if (ret) {
> 			dev_err_ratelimited(se->dev, "%s: ICC BW voting failed\n",
> 						__func__);
> 			return ret;
> 		}
> 	}
>
> similar for geni_icc_vote_off()
>
> It's just a suggestion, looks also good to me as is.

I thought giving individual path name will increase readability. But 
that doesn't seems to be adding much value on cost of repeated code.

So, I will make the suggested change in next version.

Thanks,

Akash

>
> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project

  reply	other threads:[~2020-04-02 13:46 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-31 11:09 [PATCH V3 0/8] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-03-31 11:09 ` [PATCH V3 1/8] interconnect: Add devm_of_icc_get() as exported API for users Akash Asthana
2020-03-31 11:09 ` [PATCH V3 2/8] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-03-31 17:52   ` Matthias Kaehlcke
2020-04-02 13:46     ` Akash Asthana [this message]
2020-03-31 23:32   ` Bjorn Andersson
2020-04-01 16:26     ` Evan Green
2020-04-07  6:46       ` Akash Asthana
2020-04-07  9:58         ` Georgi Djakov
2020-04-08 11:13           ` Akash Asthana
2020-04-07  6:45     ` Akash Asthana
2020-04-07 22:07       ` Bjorn Andersson
2020-03-31 11:09 ` [PATCH V3 3/8] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-03-31 18:24   ` Matthias Kaehlcke
2020-04-01 19:46     ` Matthias Kaehlcke
2020-04-07  6:52       ` Akash Asthana
2020-04-07 11:34     ` Akash Asthana
2020-04-07 17:26       ` Matthias Kaehlcke
2020-04-08 11:38         ` Akash Asthana
2020-04-08 17:09           ` Matthias Kaehlcke
2020-03-31 11:09 ` [PATCH V3 4/8] i2c: i2c-qcom-geni: Add interconnect support Akash Asthana
2020-03-31 18:49   ` Matthias Kaehlcke
2020-04-07  7:04     ` Akash Asthana
2020-03-31 11:09 ` [PATCH V3 5/8] spi: spi-geni-qcom: " Akash Asthana
2020-03-31 19:02   ` Matthias Kaehlcke
2020-04-07  7:11     ` Akash Asthana
2020-03-31 11:09 ` [PATCH V3 6/8] tty: serial: qcom_geni_serial: " Akash Asthana
2020-03-31 19:39   ` Matthias Kaehlcke
2020-04-07  9:19     ` Akash Asthana
2020-04-07  9:40       ` Akash Asthana
2020-03-31 11:09 ` [PATCH V3 7/8] spi: spi-qcom-qspi: " Akash Asthana
2020-03-31 11:23   ` Mark Brown
2020-04-07  9:54     ` Akash Asthana
2020-04-07 10:55       ` Mark Brown
2020-04-08 12:17         ` Akash Asthana
2020-04-09 13:17           ` Georgi Djakov
2020-04-09 13:20             ` Mark Brown
2020-04-15 10:34               ` Georgi Djakov
     [not found]             ` <eca0e6a7-effe-022c-e90e-c0672991251d@codeaurora.org>
2020-04-15 10:54               ` Georgi Djakov
2020-03-31 19:45   ` Matthias Kaehlcke
2020-03-31 11:09 ` [PATCH V3 8/8] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana

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