* [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
[not found] <1548069703-26595-1-git-send-email-alokc@codeaurora.org>
@ 2019-01-21 11:21 ` Alok Chauhan
2019-01-21 12:43 ` Mark Brown
0 siblings, 1 reply; 13+ messages in thread
From: Alok Chauhan @ 2019-01-21 11:21 UTC (permalink / raw)
To: linux-arm-msm, devicetree, Mark Brown, linux-spi, linux-kernel
Cc: andy.gross, david.brown, georgi.djakov, dianders, swboyd,
bjorn.andersson, Alok Chauhan
Get the interconnect paths for SPI based Serial Engine device
and vote accordingly based on maximum supported SPI frequency.
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
---
drivers/spi/spi-geni-qcom.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index fdb7cb88..7bbbe9d 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -12,6 +12,7 @@
#include <linux/qcom-geni-se.h>
#include <linux/spi/spi.h>
#include <linux/spinlock.h>
+#include <linux/interconnect.h>
/* SPI SE specific registers and respective register fields */
#define SE_SPI_CPHA 0x224
@@ -589,6 +590,15 @@ static int spi_geni_probe(struct platform_device *pdev)
spin_lock_init(&mas->lock);
pm_runtime_enable(&pdev->dev);
+ /* Set the bus quota to a reasonable value */
+ mas->se.avg_bw = Bps_to_icc(2500);
+ mas->se.peak_bw = Bps_to_icc(200000000);
+ ret = geni_interconnect_init(&mas->se);
+ if (ret) {
+ dev_err(&pdev->dev, "interconnect_init failed %d\n", ret);
+ return ret;
+ }
+
ret = spi_geni_init(mas);
if (ret)
goto spi_geni_probe_runtime_disable;
@@ -628,8 +638,15 @@ static int __maybe_unused spi_geni_runtime_suspend(struct device *dev)
{
struct spi_master *spi = dev_get_drvdata(dev);
struct spi_geni_master *mas = spi_master_get_devdata(spi);
+ int ret;
- return geni_se_resources_off(&mas->se);
+ ret = geni_se_resources_off(&mas->se);
+ if (ret)
+ return ret;
+
+ geni_icc_update_bw(&mas->se, false);
+
+ return 0;
}
static int __maybe_unused spi_geni_runtime_resume(struct device *dev)
@@ -637,6 +654,7 @@ static int __maybe_unused spi_geni_runtime_resume(struct device *dev)
struct spi_master *spi = dev_get_drvdata(dev);
struct spi_geni_master *mas = spi_master_get_devdata(spi);
+ geni_icc_update_bw(&mas->se, true);
return geni_se_resources_on(&mas->se);
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-21 11:21 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
@ 2019-01-21 12:43 ` Mark Brown
2019-01-22 6:21 ` alokc
0 siblings, 1 reply; 13+ messages in thread
From: Mark Brown @ 2019-01-21 12:43 UTC (permalink / raw)
To: Alok Chauhan
Cc: linux-arm-msm, devicetree, linux-spi, linux-kernel, andy.gross,
david.brown, georgi.djakov, dianders, swboyd, bjorn.andersson
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On Mon, Jan 21, 2019 at 04:51:41PM +0530, Alok Chauhan wrote:
> Get the interconnect paths for SPI based Serial Engine device
> and vote accordingly based on maximum supported SPI frequency.
I don't have any of the other patches in this series or a cover letter -
what's going on with dependencies here?
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-21 12:43 ` Mark Brown
@ 2019-01-22 6:21 ` alokc
0 siblings, 0 replies; 13+ messages in thread
From: alokc @ 2019-01-22 6:21 UTC (permalink / raw)
To: Mark Brown
Cc: linux-arm-msm, devicetree, linux-spi, linux-kernel, andy.gross,
david.brown, georgi.djakov, dianders, swboyd, bjorn.andersson,
linux-spi-owner
On 2019-01-21 18:13, Mark Brown wrote:
> On Mon, Jan 21, 2019 at 04:51:41PM +0530, Alok Chauhan wrote:
>> Get the interconnect paths for SPI based Serial Engine device
>> and vote accordingly based on maximum supported SPI frequency.
>
> I don't have any of the other patches in this series or a cover letter
> -
> what's going on with dependencies here?
I am extremely sorry to waste your time. Looks like I missed some
mailing list while sending patches upstream. I will resend patches
today.
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
Forum,a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 0/6] Add interconnect support for GENI QUPs
@ 2019-01-22 6:33 Alok Chauhan
2019-01-22 6:33 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
0 siblings, 1 reply; 13+ messages in thread
From: Alok Chauhan @ 2019-01-22 6:33 UTC (permalink / raw)
To: linux-arm-msm, devicetree, linux-kernel, linux-i2c, linux-spi,
linux-serial
Cc: andy.gross, david.brown, georgi.djakov, dianders, swboyd,
bjorn.andersson, Alok Chauhan
This patch series contains following:
* Add wrapper framework to support interconnect path from GENI QUPs.
This wrapper enabled and help individual SEs to put their BW request.
Adding this wrapper make sense because we don't want individual SEs
to request to interconnect driver separately and put individual bw
votes from QUP.
This wrapper framework does the following:
- Request for interconnect path handle
- Maintain record of individual SEs' avg/peak bw.
- Aggregated avg/peak bw based on how many SE's are active and put
single bw request from QUP
* Interconnect wrapper API calling from I2C, SPI & Uart driver
* dt binding in sdm845 soc for Interconnect path for GENI QUPs
* dt binding documentation
Alok Chauhan (6):
dt-bindings: soc: qcom: Add interconnect binding for GENI QUP
soc: qcom: Add wrapper to support for Interconnect path
i2c: i2c-qcom-geni: Add interconnect support
spi: spi-geni-qcom: Add interconnect support
tty: serial: qcom_geni_serial: Add interconnect support
arm64: dts: sdm845: Add interconnect for GENI QUP
.../devicetree/bindings/soc/qcom/qcom,geni-se.txt | 10 ++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 14 +++
drivers/i2c/busses/i2c-qcom-geni.c | 13 +++
drivers/soc/qcom/qcom-geni-se.c | 129 +++++++++++++++++++++
drivers/spi/spi-geni-qcom.c | 20 +++-
drivers/tty/serial/qcom_geni_serial.c | 27 ++++-
include/linux/qcom-geni-se.h | 11 ++
7 files changed, 222 insertions(+), 2 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-22 6:33 [PATCH 0/6] Add interconnect support for GENI QUPs Alok Chauhan
@ 2019-01-22 6:33 ` Alok Chauhan
2019-01-22 20:29 ` Mark Brown
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: Alok Chauhan @ 2019-01-22 6:33 UTC (permalink / raw)
To: linux-arm-msm, devicetree, linux-kernel, linux-i2c, linux-spi,
linux-serial, Mark Brown
Cc: andy.gross, david.brown, georgi.djakov, dianders, swboyd,
bjorn.andersson, Alok Chauhan
Get the interconnect paths for SPI based Serial Engine device
and vote accordingly based on maximum supported SPI frequency.
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
---
drivers/spi/spi-geni-qcom.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index fdb7cb88..7bbbe9d 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -12,6 +12,7 @@
#include <linux/qcom-geni-se.h>
#include <linux/spi/spi.h>
#include <linux/spinlock.h>
+#include <linux/interconnect.h>
/* SPI SE specific registers and respective register fields */
#define SE_SPI_CPHA 0x224
@@ -589,6 +590,15 @@ static int spi_geni_probe(struct platform_device *pdev)
spin_lock_init(&mas->lock);
pm_runtime_enable(&pdev->dev);
+ /* Set the bus quota to a reasonable value */
+ mas->se.avg_bw = Bps_to_icc(2500);
+ mas->se.peak_bw = Bps_to_icc(200000000);
+ ret = geni_interconnect_init(&mas->se);
+ if (ret) {
+ dev_err(&pdev->dev, "interconnect_init failed %d\n", ret);
+ return ret;
+ }
+
ret = spi_geni_init(mas);
if (ret)
goto spi_geni_probe_runtime_disable;
@@ -628,8 +638,15 @@ static int __maybe_unused spi_geni_runtime_suspend(struct device *dev)
{
struct spi_master *spi = dev_get_drvdata(dev);
struct spi_geni_master *mas = spi_master_get_devdata(spi);
+ int ret;
- return geni_se_resources_off(&mas->se);
+ ret = geni_se_resources_off(&mas->se);
+ if (ret)
+ return ret;
+
+ geni_icc_update_bw(&mas->se, false);
+
+ return 0;
}
static int __maybe_unused spi_geni_runtime_resume(struct device *dev)
@@ -637,6 +654,7 @@ static int __maybe_unused spi_geni_runtime_resume(struct device *dev)
struct spi_master *spi = dev_get_drvdata(dev);
struct spi_geni_master *mas = spi_master_get_devdata(spi);
+ geni_icc_update_bw(&mas->se, true);
return geni_se_resources_on(&mas->se);
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-22 6:33 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
@ 2019-01-22 20:29 ` Mark Brown
2019-01-23 7:15 ` alokc
2019-01-23 16:04 ` Mark Brown
2019-01-24 1:20 ` Evan Green
2 siblings, 1 reply; 13+ messages in thread
From: Mark Brown @ 2019-01-22 20:29 UTC (permalink / raw)
To: Alok Chauhan
Cc: linux-arm-msm, devicetree, linux-kernel, linux-i2c, linux-spi,
linux-serial, andy.gross, david.brown, georgi.djakov, dianders,
swboyd, bjorn.andersson
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On Tue, Jan 22, 2019 at 12:03:34PM +0530, Alok Chauhan wrote:
> Get the interconnect paths for SPI based Serial Engine device
> and vote accordingly based on maximum supported SPI frequency.
Still not seeing anything except this patch here in my inbox - like I
said what's the story with dependencies?
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-22 20:29 ` Mark Brown
@ 2019-01-23 7:15 ` alokc
2019-01-23 10:58 ` Mark Brown
0 siblings, 1 reply; 13+ messages in thread
From: alokc @ 2019-01-23 7:15 UTC (permalink / raw)
To: Mark Brown
Cc: linux-arm-msm, devicetree, linux-kernel, linux-i2c, linux-spi,
linux-serial, andy.gross, david.brown, georgi.djakov, dianders,
swboyd, bjorn.andersson, linux-serial-owner
On 2019-01-23 01:59, Mark Brown wrote:
> On Tue, Jan 22, 2019 at 12:03:34PM +0530, Alok Chauhan wrote:
>
>> Get the interconnect paths for SPI based Serial Engine device
>> and vote accordingly based on maximum supported SPI frequency.
>
> Still not seeing anything except this patch here in my inbox - like I
> said what's the story with dependencies?
I've added linux-spi mailing list to all the patches sent as part of
this series. Not sure why you didn't get other patches. Today I've
explicitly added you in all the patches.
This change series basically enabled interconnect (as per
bindings/interconnect/interconnect.txt) support in GENI QUPs based
drivers so appropriate BW request can be put based on SE usages.
here is my complete change series:
https://lore.kernel.org/lkml/1548069703-26595-1-git-send-email-alokc@codeaurora.org/
I hope I answer to your question properly.
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
Forum,a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-23 7:15 ` alokc
@ 2019-01-23 10:58 ` Mark Brown
0 siblings, 0 replies; 13+ messages in thread
From: Mark Brown @ 2019-01-23 10:58 UTC (permalink / raw)
To: alokc
Cc: linux-arm-msm, devicetree, linux-kernel, linux-i2c, linux-spi,
linux-serial, andy.gross, david.brown, georgi.djakov, dianders,
swboyd, bjorn.andersson, linux-serial-owner
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On Wed, Jan 23, 2019 at 12:45:30PM +0530, alokc@codeaurora.org wrote:
> On 2019-01-23 01:59, Mark Brown wrote:
> > Still not seeing anything except this patch here in my inbox - like I
> > said what's the story with dependencies?
> I've added linux-spi mailing list to all the patches sent as part of this
> series. Not sure why you didn't get other patches. Today I've explicitly
> added you in all the patches.
You really need to ensure that things end up in people's inboxes -
sending them to a mailing list usually means they'll go to a completely
different folder.
> This change series basically enabled interconnect (as per
> bindings/interconnect/interconnect.txt) support in GENI QUPs based drivers
> so appropriate BW request can be put based on SE usages.
> here is my complete change series: https://lore.kernel.org/lkml/1548069703-26595-1-git-send-email-alokc@codeaurora.org/
> I hope I answer to your question properly.
So it looks like there is a dependency on earlier patches in the series,
that's what I needed to know.
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-22 6:33 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
2019-01-22 20:29 ` Mark Brown
@ 2019-01-23 16:04 ` Mark Brown
2019-01-24 1:20 ` Evan Green
2 siblings, 0 replies; 13+ messages in thread
From: Mark Brown @ 2019-01-23 16:04 UTC (permalink / raw)
To: Alok Chauhan
Cc: linux-arm-msm, devicetree, linux-kernel, linux-i2c, linux-spi,
linux-serial, andy.gross, david.brown, georgi.djakov, dianders,
swboyd, bjorn.andersson
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On Tue, Jan 22, 2019 at 12:03:34PM +0530, Alok Chauhan wrote:
> Get the interconnect paths for SPI based Serial Engine device
> and vote accordingly based on maximum supported SPI frequency.
Acked-by: Mark Brown <broonie@kernel.org>
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2019-01-22 6:33 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
2019-01-22 20:29 ` Mark Brown
2019-01-23 16:04 ` Mark Brown
@ 2019-01-24 1:20 ` Evan Green
2 siblings, 0 replies; 13+ messages in thread
From: Evan Green @ 2019-01-24 1:20 UTC (permalink / raw)
To: Alok Chauhan
Cc: linux-arm-msm, devicetree, LKML, linux-i2c, linux-spi,
linux-serial, Mark Brown, Andy Gross, David Brown, Georgi Djakov,
Doug Anderson, Stephen Boyd, Bjorn Andersson
On Mon, Jan 21, 2019 at 10:34 PM Alok Chauhan <alokc@codeaurora.org> wrote:
>
> Get the interconnect paths for SPI based Serial Engine device
> and vote accordingly based on maximum supported SPI frequency.
>
> Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
> ---
> drivers/spi/spi-geni-qcom.c | 20 +++++++++++++++++++-
> 1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index fdb7cb88..7bbbe9d 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -12,6 +12,7 @@
> #include <linux/qcom-geni-se.h>
> #include <linux/spi/spi.h>
> #include <linux/spinlock.h>
> +#include <linux/interconnect.h>
Sorted includes please, as mentioned by others.
>
> /* SPI SE specific registers and respective register fields */
> #define SE_SPI_CPHA 0x224
> @@ -589,6 +590,15 @@ static int spi_geni_probe(struct platform_device *pdev)
> spin_lock_init(&mas->lock);
> pm_runtime_enable(&pdev->dev);
>
> + /* Set the bus quota to a reasonable value */
> + mas->se.avg_bw = Bps_to_icc(2500);
> + mas->se.peak_bw = Bps_to_icc(200000000);
Like the i2c case, can we compute real value based on clock speed?
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 0/6] Add interconnect support to UART, I2C, SPI and QSPI
@ 2020-02-17 13:29 Akash Asthana
2020-02-17 13:30 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Akash Asthana
0 siblings, 1 reply; 13+ messages in thread
From: Akash Asthana @ 2020-02-17 13:29 UTC (permalink / raw)
To: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
agross-DgEjT+Ai2ygdnm+yROfE0A,
bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A,
wsa-z923LK4zBo2bacvFa/9K2g, broonie-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-spi-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, swboyd-F7+t8E8rja9g9hUCZPvPmw,
mgautam-sgV2jX0FEOL9JmXXK+q4OQ,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA, mka-F7+t8E8rja9g9hUCZPvPmw,
dianders-F7+t8E8rja9g9hUCZPvPmw, Akash Asthana
dt-binding patch for UART, I2C and SPI.
- https://patchwork.kernel.org/patch/11385965/ [Convert QUP bindings
to YAML and add ICC, pin swap doc]
dt-binding patch for QSPI.
- https://patchwork.kernel.org/cover/11386003/ [Convert QSPI binding
to YAML and add interconnect doc]
Akash Asthana (6):
soc: qcom: geni: Support for ICC voting
tty: serial: qcom_geni_serial: Add interconnect support
i2c: i2c-qcom-geni: Add interconnect support
spi: spi-geni-qcom: Add interconnect support
spi: spi-qcom-qspi: Add interconnect support
arm64: dts: sc7180: Add interconnect for QUP and QSPI
arch/arm64/boot/dts/qcom/sc7180.dtsi | 199 ++++++++++++++++++++++++++++++++++
drivers/i2c/busses/i2c-qcom-geni.c | 84 +++++++++++++-
drivers/spi/spi-geni-qcom.c | 65 ++++++++++-
drivers/spi/spi-qcom-qspi.c | 38 ++++++-
drivers/tty/serial/qcom_geni_serial.c | 84 ++++++++++++--
include/linux/qcom-geni-se.h | 31 ++++++
6 files changed, 481 insertions(+), 20 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2020-02-17 13:29 [PATCH 0/6] Add interconnect support to UART, I2C, SPI and QSPI Akash Asthana
@ 2020-02-17 13:30 ` Akash Asthana
[not found] ` <1581946205-27189-5-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-19 18:09 ` Matthias Kaehlcke
0 siblings, 2 replies; 13+ messages in thread
From: Akash Asthana @ 2020-02-17 13:30 UTC (permalink / raw)
To: gregkh, agross, bjorn.andersson, wsa, broonie, mark.rutland, robh+dt
Cc: linux-i2c, linux-spi, devicetree, swboyd, mgautam, linux-arm-msm,
linux-serial, mka, dianders, Akash Asthana
Get the interconnect paths for SPI based Serial Engine device
and vote according to the current bus speed of the driver.
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
---
drivers/spi/spi-geni-qcom.c | 65 ++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 62 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index c397242..a066ef26 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -118,6 +118,35 @@ static int get_spi_clk_cfg(unsigned int speed_hz,
return ret;
}
+static int geni_spi_icc_get(struct geni_se *se)
+{
+ if (!se)
+ return -EINVAL;
+
+ se->icc_path[GENI_TO_CORE] = of_icc_get(se->dev, "qup-core");
+ if (IS_ERR(se->icc_path[GENI_TO_CORE]))
+ return PTR_ERR(se->icc_path[GENI_TO_CORE]);
+
+ se->icc_path[CPU_TO_GENI] = of_icc_get(se->dev, "qup-config");
+ if (IS_ERR(se->icc_path[CPU_TO_GENI])) {
+ icc_put(se->icc_path[GENI_TO_CORE]);
+ se->icc_path[GENI_TO_CORE] = NULL;
+ return PTR_ERR(se->icc_path[CPU_TO_GENI]);
+ }
+
+ return 0;
+}
+
+void geni_spi_icc_put(struct geni_se *se)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(se->icc_path); i++) {
+ icc_put(se->icc_path[i]);
+ se->icc_path[i] = NULL;
+ }
+}
+
static void handle_fifo_timeout(struct spi_master *spi,
struct spi_message *msg)
{
@@ -234,6 +263,11 @@ static int setup_fifo_params(struct spi_device *spi_slv,
return ret;
}
+ /* Set BW quota for CPU as driver supports FIFO mode only */
+ se->avg_bw_cpu = Bps_to_icc(mas->cur_speed_hz);
+ se->peak_bw_cpu = Bps_to_icc(2 * mas->cur_speed_hz);
+ icc_set_bw(se->icc_path[CPU_TO_GENI], se->avg_bw_cpu, se->peak_bw_cpu);
+
clk_sel = idx & CLK_SEL_MSK;
m_clk_cfg = (div << CLK_DIV_SHFT) | SER_CLK_EN;
spi_setup_word_len(mas, spi_slv->mode, spi_slv->bits_per_word);
@@ -578,13 +612,22 @@ static int spi_geni_probe(struct platform_device *pdev)
spin_lock_init(&mas->lock);
pm_runtime_enable(dev);
- ret = spi_geni_init(mas);
+ ret = geni_spi_icc_get(&mas->se);
if (ret)
goto spi_geni_probe_runtime_disable;
+ /* Set the bus quota to a reasonable value */
+ mas->se.avg_bw_core = Bps_to_icc(CORE_2X_50_MHZ);
+ mas->se.peak_bw_core = Bps_to_icc(CORE_2X_100_MHZ);
+ mas->se.avg_bw_cpu = Bps_to_icc(1000);
+ mas->se.peak_bw_cpu = Bps_to_icc(1000);
+
+ ret = spi_geni_init(mas);
+ if (ret)
+ goto spi_geni_icc_put;
ret = request_irq(mas->irq, geni_spi_isr, 0, dev_name(dev), spi);
if (ret)
- goto spi_geni_probe_runtime_disable;
+ goto spi_geni_icc_put;
ret = spi_register_master(spi);
if (ret)
@@ -593,6 +636,8 @@ static int spi_geni_probe(struct platform_device *pdev)
return 0;
spi_geni_probe_free_irq:
free_irq(mas->irq, spi);
+spi_geni_icc_put:
+ geni_spi_icc_put(&mas->se);
spi_geni_probe_runtime_disable:
pm_runtime_disable(dev);
spi_master_put(spi);
@@ -608,16 +653,25 @@ static int spi_geni_remove(struct platform_device *pdev)
spi_unregister_master(spi);
free_irq(mas->irq, spi);
+ geni_spi_icc_put(&mas->se);
pm_runtime_disable(&pdev->dev);
return 0;
}
static int __maybe_unused spi_geni_runtime_suspend(struct device *dev)
{
+ int ret;
struct spi_master *spi = dev_get_drvdata(dev);
struct spi_geni_master *mas = spi_master_get_devdata(spi);
- return geni_se_resources_off(&mas->se);
+ ret = geni_se_resources_off(&mas->se);
+ if (ret)
+ return ret;
+
+ icc_set_bw(mas->se.icc_path[GENI_TO_CORE], 0, 0);
+ icc_set_bw(mas->se.icc_path[CPU_TO_GENI], 0, 0);
+
+ return 0;
}
static int __maybe_unused spi_geni_runtime_resume(struct device *dev)
@@ -625,6 +679,11 @@ static int __maybe_unused spi_geni_runtime_resume(struct device *dev)
struct spi_master *spi = dev_get_drvdata(dev);
struct spi_geni_master *mas = spi_master_get_devdata(spi);
+ icc_set_bw(mas->se.icc_path[GENI_TO_CORE], mas->se.avg_bw_core,
+ mas->se.peak_bw_core);
+ icc_set_bw(mas->se.icc_path[CPU_TO_GENI], mas->se.avg_bw_cpu,
+ mas->se.peak_bw_cpu);
+
return geni_se_resources_on(&mas->se);
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 13+ messages in thread
[parent not found: <1581946205-27189-5-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
[not found] ` <1581946205-27189-5-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2020-02-17 16:31 ` Mark Brown
0 siblings, 0 replies; 13+ messages in thread
From: Mark Brown @ 2020-02-17 16:31 UTC (permalink / raw)
To: Akash Asthana
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
agross-DgEjT+Ai2ygdnm+yROfE0A,
bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A,
wsa-z923LK4zBo2bacvFa/9K2g, mark.rutland-5wv7dgnIgG8,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-spi-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, swboyd-F7+t8E8rja9g9hUCZPvPmw,
mgautam-sgV2jX0FEOL9JmXXK+q4OQ,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA, mka-F7+t8E8rja9g9hUCZPvPmw,
dianders-F7+t8E8rja9g9hUCZPvPmw
[-- Attachment #1: Type: text/plain, Size: 260 bytes --]
On Mon, Feb 17, 2020 at 07:00:03PM +0530, Akash Asthana wrote:
> Get the interconnect paths for SPI based Serial Engine device
> and vote according to the current bus speed of the driver.
Acked-by: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support
2020-02-17 13:30 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Akash Asthana
[not found] ` <1581946205-27189-5-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2020-02-19 18:09 ` Matthias Kaehlcke
[not found] ` <20200219180950.GA24720-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
1 sibling, 1 reply; 13+ messages in thread
From: Matthias Kaehlcke @ 2020-02-19 18:09 UTC (permalink / raw)
To: Akash Asthana
Cc: gregkh, agross, bjorn.andersson, wsa, broonie, mark.rutland,
robh+dt, linux-i2c, linux-spi, devicetree, swboyd, mgautam,
linux-arm-msm, linux-serial, dianders
On Mon, Feb 17, 2020 at 07:00:03PM +0530, Akash Asthana wrote:
> Get the interconnect paths for SPI based Serial Engine device
> and vote according to the current bus speed of the driver.
>
> Signed-off-by: Akash Asthana <akashast@codeaurora.org>
> ---
> drivers/spi/spi-geni-qcom.c | 65 ++++++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 62 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index c397242..a066ef26 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -608,16 +653,25 @@ static int spi_geni_remove(struct platform_device *pdev)
> spi_unregister_master(spi);
>
> free_irq(mas->irq, spi);
> + geni_spi_icc_put(&mas->se);
> pm_runtime_disable(&pdev->dev);
> return 0;
> }
>
> static int __maybe_unused spi_geni_runtime_suspend(struct device *dev)
> {
> + int ret;
> struct spi_master *spi = dev_get_drvdata(dev);
> struct spi_geni_master *mas = spi_master_get_devdata(spi);
>
> - return geni_se_resources_off(&mas->se);
> + ret = geni_se_resources_off(&mas->se);
> + if (ret)
> + return ret;
> +
> + icc_set_bw(mas->se.icc_path[GENI_TO_CORE], 0, 0);
This causes my SC7180 system to reset at boot time:
[ 3.509652] qcom-qmp-phy 88e9000.phy-wrapper: Registered Qcom-QMP phy
[ 3.516956] qcom-qusb2-phy 88e3000.phy: Registered Qcom-QUSB2 phy
[ 3.524450] geni_se_qup 8c0000.geniqup: Adding to iommu group 4
[ 3.533896] spi_master spi0: will run message pump with realtime priority
<reset>
The system does not reset when passing 'Bps_to_icc(1000)' (=> 1) instead of 0.
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2020-02-21 18:55 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <1548069703-26595-1-git-send-email-alokc@codeaurora.org>
2019-01-21 11:21 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
2019-01-21 12:43 ` Mark Brown
2019-01-22 6:21 ` alokc
2019-01-22 6:33 [PATCH 0/6] Add interconnect support for GENI QUPs Alok Chauhan
2019-01-22 6:33 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Alok Chauhan
2019-01-22 20:29 ` Mark Brown
2019-01-23 7:15 ` alokc
2019-01-23 10:58 ` Mark Brown
2019-01-23 16:04 ` Mark Brown
2019-01-24 1:20 ` Evan Green
2020-02-17 13:29 [PATCH 0/6] Add interconnect support to UART, I2C, SPI and QSPI Akash Asthana
2020-02-17 13:30 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Akash Asthana
[not found] ` <1581946205-27189-5-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-17 16:31 ` Mark Brown
2020-02-19 18:09 ` Matthias Kaehlcke
[not found] ` <20200219180950.GA24720-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2020-02-21 18:55 ` Matthias Kaehlcke
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