From: Akash Asthana <akashast@codeaurora.org>
To: Matthias Kaehlcke <mka@chromium.org>
Cc: gregkh@linuxfoundation.org, agross@kernel.org,
bjorn.andersson@linaro.org, wsa@the-dreams.de,
broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, swboyd@chromium.org,
mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-serial@vger.kernel.org, dianders@chromium.org
Subject: Re: [PATCH 3/6] i2c: i2c-qcom-geni: Add interconnect support
Date: Wed, 19 Feb 2020 19:17:44 +0530 [thread overview]
Message-ID: <84a7d97a-4e10-5509-9c87-af8a545c7385@codeaurora.org> (raw)
In-Reply-To: <20200218224709.GF15781@google.com>
Hi Matthias,
On 2/19/2020 4:17 AM, Matthias Kaehlcke wrote:
> On Mon, Feb 17, 2020 at 07:00:02PM +0530, Akash Asthana wrote:
>> Get the interconnect paths for I2C based Serial Engine device
>> and vote according to the bus speed of the driver.
>>
>> Signed-off-by: Akash Asthana <akashast@codeaurora.org>
>> ---
>> drivers/i2c/busses/i2c-qcom-geni.c | 84 ++++++++++++++++++++++++++++++++++++--
>> 1 file changed, 80 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
>> index 17abf60c..5de10a1 100644
>> --- a/drivers/i2c/busses/i2c-qcom-geni.c
>> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
>> @@ -163,6 +163,44 @@ static void qcom_geni_i2c_conf(struct geni_i2c_dev *gi2c)
>> writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS);
>> }
>>
>> +static int geni_i2c_icc_get(struct geni_se *se)
>> +{
>> + if (!se)
>> + return -EINVAL;
> check is not needed
ok, will remove.
>
>> +
>> + se->icc_path[GENI_TO_CORE] = of_icc_get(se->dev, "qup-core");
>> + if (IS_ERR(se->icc_path[GENI_TO_CORE]))
>> + return PTR_ERR(se->icc_path[GENI_TO_CORE]);
>> +
>> + se->icc_path[CPU_TO_GENI] = of_icc_get(se->dev, "qup-config");
>> + if (IS_ERR(se->icc_path[CPU_TO_GENI])) {
>> + icc_put(se->icc_path[GENI_TO_CORE]);
>> + se->icc_path[GENI_TO_CORE] = NULL;
> echoing Bjorn's comments on 'tty: serial: qcom_geni_serial: Add
> interconnect support', resetting is not needed since _probe() will
> fail.
ok, will remove
>> + return PTR_ERR(se->icc_path[CPU_TO_GENI]);
>> + }
>> +
>> + se->icc_path[GENI_TO_DDR] = of_icc_get(se->dev, "qup-memory");
>> + if (IS_ERR(se->icc_path[GENI_TO_DDR])) {
>> + icc_put(se->icc_path[GENI_TO_CORE]);
>> + se->icc_path[GENI_TO_CORE] = NULL;
> ditto
ok
>> + icc_put(se->icc_path[CPU_TO_GENI]);
>> + se->icc_path[CPU_TO_GENI] = NULL;
> ditto
ok
>> + return PTR_ERR(se->icc_path[GENI_TO_DDR]);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +void geni_i2c_icc_put(struct geni_se *se)
>> +{
>> + int i;
>> +
>> + for (i = 0; i < ARRAY_SIZE(se->icc_path); i++) {
>> + icc_put(se->icc_path[i]);
>> + se->icc_path[i] = NULL;
> not needed
ok, will remove
>> + }
>> +}
>> +
>> static void geni_i2c_err_misc(struct geni_i2c_dev *gi2c)
>> {
>> u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0);
>> @@ -563,17 +601,34 @@ static int geni_i2c_probe(struct platform_device *pdev)
>> gi2c->adap.dev.of_node = pdev->dev.of_node;
>> strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
>>
>> + ret = geni_i2c_icc_get(&gi2c->se);
>> + if (ret)
>> + return ret;
>> + /* Set the bus quota to a reasonable value */
>> + gi2c->se.avg_bw_core = Bps_to_icc(1000);
>> + gi2c->se.peak_bw_core = Bps_to_icc(CORE_2X_100_MHZ);
>> + gi2c->se.avg_bw_cpu = Bps_to_icc(1000);
>> + gi2c->se.peak_bw_cpu = Bps_to_icc(1000);
>> + gi2c->se.avg_bw_ddr = Bps_to_icc(gi2c->clk_freq_out);
>> + gi2c->se.peak_bw_ddr = Bps_to_icc(2 * gi2c->clk_freq_out);
>> +
>> + /* Vote for core clocks and CPU for register access */
>> + icc_set_bw(gi2c->se.icc_path[GENI_TO_CORE], gi2c->se.avg_bw_core,
>> + gi2c->se.peak_bw_core);
>> + icc_set_bw(gi2c->se.icc_path[CPU_TO_GENI], gi2c->se.avg_bw_cpu,
>> + gi2c->se.peak_bw_cpu);
> error handling needed?
I will add error handling for GENI_TO_CORE path in all the drivers. Will
it be okay if we don't handle errors for CPU_TO_GENI and GENI_TO_DDR path
as CPU and DDR will be running at much higher frequency?
Regards,
Akash
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-02-19 13:47 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-17 13:29 [PATCH 0/6] Add interconnect support to UART, I2C, SPI and QSPI Akash Asthana
[not found] ` <1581946205-27189-1-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-17 13:30 ` [PATCH 1/6] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-02-18 3:03 ` Bjorn Andersson
2020-02-19 13:25 ` Akash Asthana
2020-02-17 13:30 ` [PATCH 2/6] tty: serial: qcom_geni_serial: Add interconnect support Akash Asthana
2020-02-17 16:00 ` Greg KH
[not found] ` <1581946205-27189-3-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-18 3:15 ` Bjorn Andersson
2020-02-19 13:28 ` Akash Asthana
2020-02-18 22:34 ` Matthias Kaehlcke
2020-02-19 13:31 ` Akash Asthana
2020-02-17 13:30 ` [PATCH 3/6] i2c: i2c-qcom-geni: " Akash Asthana
[not found] ` <1581946205-27189-4-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-18 22:47 ` Matthias Kaehlcke
2020-02-19 13:47 ` Akash Asthana [this message]
2020-02-21 0:24 ` Matthias Kaehlcke
2020-03-09 17:59 ` [PATCH 0/6] Add interconnect support to UART, I2C, SPI and QSPI Matthias Kaehlcke
2020-03-11 13:02 ` Akash Asthana
2020-02-17 13:30 ` [PATCH 4/6] spi: spi-geni-qcom: Add interconnect support Akash Asthana
[not found] ` <1581946205-27189-5-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-17 16:31 ` Mark Brown
2020-02-19 18:09 ` Matthias Kaehlcke
[not found] ` <20200219180950.GA24720-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2020-02-21 18:55 ` Matthias Kaehlcke
2020-02-17 13:30 ` [PATCH 5/6] spi: spi-qcom-qspi: " Akash Asthana
2020-02-17 16:35 ` Mark Brown
2020-02-17 13:30 ` [PATCH 6/6] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana
2020-02-18 3:18 ` Bjorn Andersson
2020-02-19 13:49 ` Akash Asthana
[not found] ` <1581946205-27189-7-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2020-02-27 12:11 ` Amit Kucheria
2020-02-27 17:03 ` Matthias Kaehlcke
-- strict thread matches above, loose matches on Subject: below --
2019-01-22 6:33 [PATCH 0/6] Add interconnect support for GENI QUPs Alok Chauhan
2019-01-22 6:33 ` [PATCH 3/6] i2c: i2c-qcom-geni: Add interconnect support Alok Chauhan
2019-01-22 9:07 ` Wolfram Sang
2019-01-22 9:13 ` Peter Rosin
2019-01-23 6:51 ` alokc
2019-01-24 1:19 ` Evan Green
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=84a7d97a-4e10-5509-9c87-af8a545c7385@codeaurora.org \
--to=akashast@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=gregkh@linuxfoundation.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-i2c@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mgautam@codeaurora.org \
--cc=mka@chromium.org \
--cc=robh+dt@kernel.org \
--cc=swboyd@chromium.org \
--cc=wsa@the-dreams.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).