* [PATCH 3/3] spi: spi-rockchip: Fix unused chip select line when using gpio cs
@ 2024-01-26 19:47 Luis de Arquer
2024-01-27 9:48 ` Luis de Arquer
0 siblings, 1 reply; 2+ messages in thread
From: Luis de Arquer @ 2024-01-26 19:47 UTC (permalink / raw)
To: linux-spi, linux-rockchip
Cc: broonie, heiko, linux-arm-kernel, Robin Murphy, luis.dearquer
From: Luis de Arquer <luis.dearquer@inertim.com>
This change allows the DT to use native c1 for a device while leaving
native cs0 reserved for allowing gpio cs operation
Signed-off-by: Luis de Arquer <luis.dearquer@inertim.com>
---
drivers/spi/spi-rockchip.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index e1ecd96c7858..e1ae62e8765c 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -247,13 +247,13 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
pm_runtime_get_sync(rs->dev);
if (spi_get_csgpiod(spi, 0))
- ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
+ ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, ctlr->unused_native_cs);
else
ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER,
BIT(spi_get_chipselect(spi, 0)));
} else {
if (spi_get_csgpiod(spi, 0))
- ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
+ ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, ctlr->unused_native_cs);
else
ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER,
BIT(spi_get_chipselect(spi, 0)));
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 3/3] spi: spi-rockchip: Fix unused chip select line when using gpio cs
2024-01-26 19:47 [PATCH 3/3] spi: spi-rockchip: Fix unused chip select line when using gpio cs Luis de Arquer
@ 2024-01-27 9:48 ` Luis de Arquer
0 siblings, 0 replies; 2+ messages in thread
From: Luis de Arquer @ 2024-01-27 9:48 UTC (permalink / raw)
To: linux-spi, linux-rockchip
Cc: broonie, heiko, linux-arm-kernel, Robin Murphy, luis.dearquer
On Fri, 2024-01-26 at 20:47 +0100, Luis de Arquer wrote:
> This change allows the DT to use native c1 for a device while leaving
> native cs0 reserved for allowing gpio cs operation
>
Actually, I think this comment is the other way around -reserve cs1 and use cs0 for device.
Before, it was using cs0 for gpio operation always.
>
> - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, ctlr->unused_native_cs);
s/ctlr->unused_native_cs/BIT(ctlr->unused_native_cs)/
I mixed up cs numbers and bitmask, sorry.
I'll fix for v2
Luis
^ permalink raw reply [flat|nested] 2+ messages in thread
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