Re: [PATCH 3/3] ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable usb_otg

[Chen-Yu Tsai <wens@csie.org>]

On Mon, Jul 5, 2021 at 2:30 PM qianfan <qianfanguijin@163.com> wrote:
> 在 2021/7/5 14:20, Chen-Yu Tsai 写道:
> > On Mon, Jul 5, 2021 at 11:51 AM qianfan <qianfanguijin@163.com> wrote:
> >> 在 2021/7/2 20:30, Chen-Yu Tsai 写道:
> >>> On Fri, Jul 2, 2021 at 8:24 PM Andre Przywara <andre.przywara@arm.com> wrote:
> >>>> On Fri, 2 Jul 2021 14:06:01 +0200
> >>>> Maxime Ripard <maxime@cerno.tech> wrote:
> >>>>
> >>>> Hi,
> >>>>
> >>>>> On Fri, Jul 02, 2021 at 10:46:20AM +0800, qianfan wrote:
> >>>>>> 在 2021/7/1 22:47, Chen-Yu Tsai 写道:
> >>>>>>> On Thu, Jul 1, 2021 at 10:37 PM Andre Przywara <andre.przywara@arm.com> wrote:
> >>>>>>>> On Thu,  1 Jul 2021 09:50:09 +0800
> >>>>>>>> qianfanguijin@163.com wrote:
> >>>>>>>>
> >>>>>>>> Hi,
> >>>>>>>>
> >>>>>>>>> From: qianfan Zhao <qianfanguijin@163.com>
> >>>>>>>>>
> >>>>>>>>> Enable it.
> >>>>>>>>>
> >>>>>>>>> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> >>>>>>>>> ---
> >>>>>>>>>     arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 14 ++++++++++++++
> >>>>>>>>>     1 file changed, 14 insertions(+)
> >>>>>>>>>
> >>>>>>>>> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>>>>>>>> index a6a1087a0c9b..072535b383b5 100644
> >>>>>>>>> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>>>>>>>> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> >>>>>>>>> @@ -43,6 +43,7 @@
> >>>>>>>>>
> >>>>>>>>>     /dts-v1/;
> >>>>>>>>>     #include "sun8i-r40.dtsi"
> >>>>>>>>> +#include "sunxi-common-regulators.dtsi"
> >>>>>>>>>
> >>>>>>>>>     #include <dt-bindings/gpio/gpio.h>
> >>>>>>>>>
> >>>>>>>>> @@ -299,6 +300,11 @@
> >>>>>>>>>          regulator-name = "vdd1v2-sata";
> >>>>>>>>>     };
> >>>>>>>>>
> >>>>>>>>> +&reg_usb0_vbus {
> >>>>>>>>> +     gpio = <&pio 8 13 GPIO_ACTIVE_HIGH>; /* PI13 */
> >>>>>>>>> +     status = "okay";
> >>>>>>>>> +};
> >>>>>>>> So there is the same USB0-DRVVBUS signal connected to this GPIO, but
> >>>>>>>> also to the AXP's N_VBUSEN line.
> >>>>>>>>
> >>>>>>>> Not sure if that means either of them can control the voltage?
> >>>>>>> It's better to use N_VBUSEN if that is connected. Since the PMIC
> >>>>>>> may have that pin already enabled, it can cause issues with VBUS
> >>>>>>> input not being correctly used.
> >>>>>> I had checked some boards in linux such as sun7i-a20-olinuxino-lime2.dts,
> >>>>>> they has the same design
> >>>>>>
> >>>>>> that enable VBUS by using a gpio and then connect this gpio to PMIC.
> >>>>>>
> >>>>>> there is a example:
> >>>>>>
> >>>>>> ./sun7i-a20-olinuxino-lime2.dts:&reg_usb0_vbus {
> >>>>>> ./sun7i-a20-olinuxino-lime2.dts-        gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
> >>>>>> ./sun7i-a20-olinuxino-lime2.dts-        status = "okay";
> >>>>>> ./sun7i-a20-olinuxino-lime2.dts-};
> >>>>> IIRC, the AXP209 typically used with these boards doesn't have a
> >>>>> N_VBUSEN line
> >>>> According to the Lime2 schematic and the AXP209 data sheet from the Wiki
> >>>> it does have N_VBUSEN, from a quick glance with the usual
> >>>> functionality. And the connection on the Lime2 looks indeed the same,
> >>>> USB0_DRVVBUS connected to both the PMIC and a GPIO.
> >>>> (Also the BPi-M2 Ultra has an AXP221 anyway.)
> >>> The difference is that the N_VBUSEN pin on the AXP221 can be used as an
> >>> output, while on the AXP209 it is strictly an input. And U-Boot tends
> >>> to leave pins it has used in whatever state last used so ideally we
> >>> need to coordinate both to use the same method. Otherwise you might
> >>> end up with N_VBUSEN always driving DRVVBUS high or low, and the GPIO
> >>> on the SoC not having any effect. Ideally we need some way to reset
> >>> the state of the pins to high-Z.
> >>>
> >>> ChenYu
> >> I had changed the dts to control VBUS by using PMIC, but I had a
> >> question: what's the perpose of
> >>
> >> the gpio?
> > Which GPIO? You mean the one on the SoC wired to N_VBUSEN and DRVVBUS?
> > Or N_VBUSEN itself?
> I means USB0-DRVVBUS(PI13) on bpi m2u. We can control VBUS by PMIC, and
> PI13 seems is a redundant design.

Well, that depends on if you want the PMIC to be the component in control.
If you want the SoC to be in control, then the N_VBUSEN pin could be put
in its input mode instead.


ChenYu