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From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
	Lorenzo Pieralisi
	<lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
Cc: Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Gustavo Pimentel
	<gustavo.pimentel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>,
	Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	Hou Zhiqiang <Zhiqiang.Hou-3arQi8VN3Tc@public.gmane.org>,
	Jingoo Han <jingoohan1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jonathan Hunter
	<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Karthikeyan Mitran
	<m.karthikeyan-DTHOJn6Rh8lhmhkoCovsdw@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Marek Vasut
	<marek.vasut+renesas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Michal Simek
	<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>,
	NXP Linux Team <linux-imx-3arQi8VN3Tc@public.gmane.org>,
	Pengutronix Kernel Team
	<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Richard Zhu <hongxing.zhu-3arQi8VN3Tc@public.gmane.org>,
	Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: [PATCH 09/19] PCI: rockchip: Use pci_is_root_bus() to check if bus is root bus
Date: Tue, 21 Jul 2020 20:25:04 -0600	[thread overview]
Message-ID: <20200722022514.1283916-10-robh@kernel.org> (raw)
In-Reply-To: <20200722022514.1283916-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Use pci_is_root_bus() rather than tracking the root bus number to
determine if the bus is the root bus or not. This removes storing
duplicated data as well as the need for the host bridge driver to have
to care about the bus numbers in most cases.

Also, bridge->busnr is never set so effectively the root bus must be 0.
This will be fixed by a subsequent commit.

Cc: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
Cc: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
Cc: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 drivers/pci/controller/pcie-rockchip-host.c | 17 +++++++----------
 drivers/pci/controller/pcie-rockchip.h      |  1 -
 2 files changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index fb88030161f2..9a30d08976d8 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -72,14 +72,14 @@ static int rockchip_pcie_valid_device(struct rockchip_pcie *rockchip,
 				      struct pci_bus *bus, int dev)
 {
 	/* access only one slot on each root port */
-	if (bus->number == rockchip->root_bus_nr && dev > 0)
+	if (pci_is_root_bus(bus) && dev > 0)
 		return 0;
 
 	/*
 	 * do not read more than one device on the bus directly attached
 	 * to RC's downstream side.
 	 */
-	if (bus->primary == rockchip->root_bus_nr && dev > 0)
+	if (pci_is_root_bus(bus->parent) && dev > 0)
 		return 0;
 
 	return 1;
@@ -170,7 +170,7 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip,
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	if (bus->parent->number == rockchip->root_bus_nr)
+	if (pci_is_root_bus(bus->parent))
 		rockchip_pcie_cfg_configuration_accesses(rockchip,
 						AXI_WRAPPER_TYPE0_CFG);
 	else
@@ -201,7 +201,7 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip,
 	if (!IS_ALIGNED(busdev, size))
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	if (bus->parent->number == rockchip->root_bus_nr)
+	if (pci_is_root_bus(bus->parent))
 		rockchip_pcie_cfg_configuration_accesses(rockchip,
 						AXI_WRAPPER_TYPE0_CFG);
 	else
@@ -230,7 +230,7 @@ static int rockchip_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 
-	if (bus->number == rockchip->root_bus_nr)
+	if (pci_is_root_bus(bus))
 		return rockchip_pcie_rd_own_conf(rockchip, where, size, val);
 
 	return rockchip_pcie_rd_other_conf(rockchip, bus, devfn, where, size,
@@ -245,7 +245,7 @@ static int rockchip_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 	if (!rockchip_pcie_valid_device(rockchip, bus, PCI_SLOT(devfn)))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	if (bus->number == rockchip->root_bus_nr)
+	if (pci_is_root_bus(bus))
 		return rockchip_pcie_wr_own_conf(rockchip, where, size, val);
 
 	return rockchip_pcie_wr_other_conf(rockchip, bus, devfn, where, size,
@@ -950,7 +950,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
 	struct rockchip_pcie *rockchip;
 	struct device *dev = &pdev->dev;
 	struct pci_host_bridge *bridge;
-	struct resource *bus_res;
 	int err;
 
 	if (!dev->of_node)
@@ -991,12 +990,10 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
 		goto err_deinit_port;
 
 	err = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
-					      &bridge->dma_ranges, &bus_res);
+					      &bridge->dma_ranges, NULL);
 	if (err)
 		goto err_remove_irq_domain;
 
-	rockchip->root_bus_nr = bus_res->start;
-
 	err = rockchip_pcie_cfg_atu(rockchip);
 	if (err)
 		goto err_remove_irq_domain;
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 4012543bafbe..c7d0178fc8c2 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -298,7 +298,6 @@ struct rockchip_pcie {
 	struct	gpio_desc *ep_gpio;
 	u32	lanes;
 	u8      lanes_map;
-	u8	root_bus_nr;
 	int	link_gen;
 	struct	device *dev;
 	struct	irq_domain *irq_domain;
-- 
2.25.1

  parent reply	other threads:[~2020-07-22  2:25 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-22  2:24 [PATCH 00/19] PCI: Another round of host clean-ups Rob Herring
     [not found] ` <20200722022514.1283916-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-22  2:24   ` [PATCH 01/19] PCI: versatile: Drop flag PCI_ENABLE_PROC_DOMAINS Rob Herring
2020-07-22  2:24   ` [PATCH 02/19] PCI: Set default bridge parent device Rob Herring
2020-07-22  2:24   ` [PATCH 03/19] PCI: Drop unnecessary zeroing of bridge fields Rob Herring
2020-07-22  2:24   ` [PATCH 04/19] PCI: aardvark: Use pci_is_root_bus() to check if bus is root bus Rob Herring
2020-07-22  2:25   ` [PATCH 05/19] PCI: designware: " Rob Herring
2020-07-22  2:25   ` [PATCH 06/19] PCI: mobiveil: " Rob Herring
2020-07-22  2:25   ` [PATCH 07/19] PCI: xilinx-nwl: " Rob Herring
2020-07-22  2:25   ` [PATCH 08/19] PCI: xilinx: " Rob Herring
2020-07-22  2:25   ` Rob Herring [this message]
2020-07-22  2:25   ` [PATCH 10/19] PCI: rcar: " Rob Herring
2020-07-22  2:25   ` [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers Rob Herring
     [not found]     ` <20200722022514.1283916-12-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-23 15:26       ` Rob Herring
     [not found]         ` <CAL_Jsq+sPaubVERLHaRzjvThk3zDO6zAnRQjGuAMKaVA87Y4HQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-07-23 16:21           ` Lorenzo Pieralisi
     [not found]             ` <20200723162148.GA11749-LhTu/34fCX3ZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2020-07-23 16:55               ` Rob Herring
2020-07-22  2:25   ` [PATCH 12/19] PCI: cadence: Use bridge resources for outbound window setup Rob Herring
2020-07-22  2:25   ` [PATCH 13/19] PCI: cadence: Remove private bus number and range storage Rob Herring
2020-07-22  2:25   ` [PATCH 14/19] PCI: rcar: Use devm_pci_alloc_host_bridge() Rob Herring
2020-07-22  2:25   ` [PATCH 15/19] PCI: rcar: Use struct pci_host_bridge.windows list directly Rob Herring
2020-07-22  2:25   ` [PATCH 16/19] PCI: of: Reduce missing non-prefetchable memory region to a warning Rob Herring
2020-07-22  2:25   ` [PATCH 17/19] PCI: rcar-gen2: Convert to use modern host bridge probe functions Rob Herring
2020-08-04 12:12     ` Geert Uytterhoeven
2020-08-04 15:13       ` Rob Herring
2020-07-22  2:25   ` [PATCH 18/19] PCI: Move DT resource setup into devm_pci_alloc_host_bridge() Rob Herring
2020-07-22  2:25   ` [PATCH 19/19] PCI: Set bridge map_irq and swizzle_irq to default functions Rob Herring
2022-01-11 21:46     ` Bjorn Helgaas
2022-01-12 12:57       ` Jiaxun Yang
2022-01-12 15:19         ` Bjorn Helgaas
2022-01-12 20:08           ` Jiaxun Yang
2022-01-12 21:10             ` Bjorn Helgaas
2022-01-13 17:44               ` Jiaxun Yang
2022-01-12 15:09       ` Rob Herring
2022-01-12 15:32         ` Bjorn Helgaas
2022-01-29 22:34       ` Maciej W. Rozycki
2020-07-22 21:06   ` [PATCH 00/19] PCI: Another round of host clean-ups Bjorn Helgaas
2020-07-23 10:39   ` Lorenzo Pieralisi

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