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From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
	Lorenzo Pieralisi
	<lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
Cc: Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Gustavo Pimentel
	<gustavo.pimentel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>,
	Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	Hou Zhiqiang <Zhiqiang.Hou-3arQi8VN3Tc@public.gmane.org>,
	Jingoo Han <jingoohan1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jonathan Hunter
	<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Karthikeyan Mitran
	<m.karthikeyan-DTHOJn6Rh8lhmhkoCovsdw@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Marek Vasut
	<marek.vasut+renesas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Michal Simek
	<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>,
	NXP Linux Team <linux-imx-3arQi8VN3Tc@public.gmane.org>,
	Pengutronix Kernel Team
	<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Richard Zhu <hongxing.zhu-3arQi8VN3Tc@public.gmane.org>,
	Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: [PATCH 07/19] PCI: xilinx-nwl: Use pci_is_root_bus() to check if bus is root bus
Date: Tue, 21 Jul 2020 20:25:02 -0600	[thread overview]
Message-ID: <20200722022514.1283916-8-robh@kernel.org> (raw)
In-Reply-To: <20200722022514.1283916-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Use pci_is_root_bus() rather than tracking the root bus number to
determine if the bus is the root bus or not. This removes storing
duplicated data as well as the need for the host bridge driver to have
to care about the bus numbers in most cases.

There was also a bug that the pci_host_bridge.busnr is set from
root_busno, but root_busno is never set which means the root bus number
is always 0 even if the DT said something else.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
Cc: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
Cc: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 drivers/pci/controller/pcie-xilinx-nwl.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c
index 3c747aa4b6d1..566165c18fad 100644
--- a/drivers/pci/controller/pcie-xilinx-nwl.c
+++ b/drivers/pci/controller/pcie-xilinx-nwl.c
@@ -166,7 +166,6 @@ struct nwl_pcie {
 	int irq_misc;
 	u32 ecam_value;
 	u8 last_busno;
-	u8 root_busno;
 	struct nwl_msi msi;
 	struct irq_domain *legacy_irq_domain;
 	raw_spinlock_t leg_mask_lock;
@@ -217,13 +216,11 @@ static bool nwl_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
 	struct nwl_pcie *pcie = bus->sysdata;
 
 	/* Check link before accessing downstream ports */
-	if (bus->number != pcie->root_busno) {
+	if (!pci_is_root_bus(bus)) {
 		if (!nwl_pcie_link_up(pcie))
 			return false;
-	}
-
-	/* Only one device down on each root port */
-	if (bus->number == pcie->root_busno && devfn > 0)
+	} else if (devfn > 0)
+		/* Only one device down on each root port */
 		return false;
 
 	return true;
@@ -855,7 +852,6 @@ static int nwl_pcie_probe(struct platform_device *pdev)
 	}
 
 	bridge->sysdata = pcie;
-	bridge->busnr = pcie->root_busno;
 	bridge->ops = &nwl_pcie_ops;
 	bridge->map_irq = of_irq_parse_and_map_pci;
 	bridge->swizzle_irq = pci_common_swizzle;
-- 
2.25.1

  parent reply	other threads:[~2020-07-22  2:25 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-22  2:24 [PATCH 00/19] PCI: Another round of host clean-ups Rob Herring
     [not found] ` <20200722022514.1283916-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-22  2:24   ` [PATCH 01/19] PCI: versatile: Drop flag PCI_ENABLE_PROC_DOMAINS Rob Herring
2020-07-22  2:24   ` [PATCH 02/19] PCI: Set default bridge parent device Rob Herring
2020-07-22  2:24   ` [PATCH 03/19] PCI: Drop unnecessary zeroing of bridge fields Rob Herring
2020-07-22  2:24   ` [PATCH 04/19] PCI: aardvark: Use pci_is_root_bus() to check if bus is root bus Rob Herring
2020-07-22  2:25   ` [PATCH 05/19] PCI: designware: " Rob Herring
2020-07-22  2:25   ` [PATCH 06/19] PCI: mobiveil: " Rob Herring
2020-07-22  2:25   ` Rob Herring [this message]
2020-07-22  2:25   ` [PATCH 08/19] PCI: xilinx: " Rob Herring
2020-07-22  2:25   ` [PATCH 09/19] PCI: rockchip: " Rob Herring
2020-07-22  2:25   ` [PATCH 10/19] PCI: rcar: " Rob Herring
2020-07-22  2:25   ` [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers Rob Herring
     [not found]     ` <20200722022514.1283916-12-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-23 15:26       ` Rob Herring
     [not found]         ` <CAL_Jsq+sPaubVERLHaRzjvThk3zDO6zAnRQjGuAMKaVA87Y4HQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-07-23 16:21           ` Lorenzo Pieralisi
     [not found]             ` <20200723162148.GA11749-LhTu/34fCX3ZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2020-07-23 16:55               ` Rob Herring
2020-07-22  2:25   ` [PATCH 12/19] PCI: cadence: Use bridge resources for outbound window setup Rob Herring
2020-07-22  2:25   ` [PATCH 13/19] PCI: cadence: Remove private bus number and range storage Rob Herring
2020-07-22  2:25   ` [PATCH 14/19] PCI: rcar: Use devm_pci_alloc_host_bridge() Rob Herring
2020-07-22  2:25   ` [PATCH 15/19] PCI: rcar: Use struct pci_host_bridge.windows list directly Rob Herring
2020-07-22  2:25   ` [PATCH 16/19] PCI: of: Reduce missing non-prefetchable memory region to a warning Rob Herring
2020-07-22  2:25   ` [PATCH 17/19] PCI: rcar-gen2: Convert to use modern host bridge probe functions Rob Herring
2020-08-04 12:12     ` Geert Uytterhoeven
2020-08-04 15:13       ` Rob Herring
2020-07-22  2:25   ` [PATCH 18/19] PCI: Move DT resource setup into devm_pci_alloc_host_bridge() Rob Herring
2020-07-22  2:25   ` [PATCH 19/19] PCI: Set bridge map_irq and swizzle_irq to default functions Rob Herring
2022-01-11 21:46     ` Bjorn Helgaas
2022-01-12 12:57       ` Jiaxun Yang
2022-01-12 15:19         ` Bjorn Helgaas
2022-01-12 20:08           ` Jiaxun Yang
2022-01-12 21:10             ` Bjorn Helgaas
2022-01-13 17:44               ` Jiaxun Yang
2022-01-12 15:09       ` Rob Herring
2022-01-12 15:32         ` Bjorn Helgaas
2022-01-29 22:34       ` Maciej W. Rozycki
2020-07-22 21:06   ` [PATCH 00/19] PCI: Another round of host clean-ups Bjorn Helgaas
2020-07-23 10:39   ` Lorenzo Pieralisi

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