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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Sameer Pujar <spujar@nvidia.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Takashi Iwai <tiwai@suse.com>, Jaroslav Kysela <perex@perex.cz>
Cc: alsa-devel@alsa-project.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 5/5] ASoC: tegra: ahub: Reset hardware properly
Date: Fri, 15 Jan 2021 16:02:50 +0300	[thread overview]
Message-ID: <5d99eba8-a169-1dc1-c7ab-0734c67c50b7@gmail.com> (raw)
In-Reply-To: <20210112125834.21545-6-digetx@gmail.com>

12.01.2021 15:58, Dmitry Osipenko пишет:
> Assert hardware reset before clocks are enabled and then de-assert it
> after clocks are enabled. This brings hardware into a predictable state
> and removes relying on implicit de-assertion of resets which is done by
> the clk driver.
> 
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  sound/soc/tegra/tegra30_ahub.c | 33 ++++++++++++++++-----------------
>  sound/soc/tegra/tegra30_ahub.h |  1 +
>  2 files changed, 17 insertions(+), 17 deletions(-)
> 
> diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
> index 4dbb58f7ea36..246cf6a373a1 100644
> --- a/sound/soc/tegra/tegra30_ahub.c
> +++ b/sound/soc/tegra/tegra30_ahub.c
> @@ -65,10 +65,20 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
>  {
>  	int ret;
>  
> +	ret = reset_control_assert(ahub->reset);
> +	if (ret)
> +		return ret;
> +
>  	ret = clk_bulk_prepare_enable(ahub->nclocks, ahub->clocks);
>  	if (ret)
>  		return ret;
>  
> +	ret = reset_control_reset(ahub->reset);
> +	if (ret) {
> +		clk_bulk_disable_unprepare(ahub->nclocks, ahub->clocks);
> +		return ret;
> +	}
> +
>  	regcache_cache_only(ahub->regmap_apbif, false);
>  	regcache_cache_only(ahub->regmap_ahub, false);

I just realized that this is incorrect version of the patch which misses
the regcache syncing after the h/w reset. I'll make a v2.

  reply	other threads:[~2021-01-15 13:04 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12 12:58 [PATCH v1 0/5] Clock and reset improvements for Tegra ALSA drivers Dmitry Osipenko
2021-01-12 12:58 ` [PATCH v1 1/5] ALSA: hda/tegra: Use clk_bulk helpers Dmitry Osipenko
2021-01-15 15:22   ` Thierry Reding
2021-01-17 23:31     ` Dmitry Osipenko
2021-01-19 17:31       ` Thierry Reding
2021-01-12 12:58 ` [PATCH v1 2/5] ALSA: hda/tegra: Reset hardware Dmitry Osipenko
2021-01-15 15:35   ` Thierry Reding
2021-01-17 23:39     ` Dmitry Osipenko
2021-01-19 17:30       ` Thierry Reding
2021-01-12 12:58 ` [PATCH v1 3/5] ASoC: tegra: ahub: Use of_reset_control_array_get_exclusive() Dmitry Osipenko
2021-01-15 15:37   ` Thierry Reding
2021-01-17 23:57     ` Dmitry Osipenko
2021-01-12 12:58 ` [PATCH v1 4/5] ASoC: tegra: ahub: Use clk_bulk helpers Dmitry Osipenko
2021-01-15 15:38   ` Thierry Reding
2021-01-12 12:58 ` [PATCH v1 5/5] ASoC: tegra: ahub: Reset hardware properly Dmitry Osipenko
2021-01-15 13:02   ` Dmitry Osipenko [this message]
2021-01-15 15:44   ` Thierry Reding
2021-01-18  0:02     ` Dmitry Osipenko
2021-01-19 17:34       ` Thierry Reding
2021-01-15 10:18 ` [PATCH v1 0/5] Clock and reset improvements for Tegra ALSA drivers Takashi Iwai
2021-01-15 10:52 ` Ben Dooks
2021-01-15 12:59   ` Dmitry Osipenko

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