From: Sanjay R Mehta <Sanju.Mehta@amd.com>
To: <mika.westerberg@linux.intel.com>, <andreas.noever@gmail.com>,
<michael.jamet@intel.com>, <YehezkelShB@gmail.com>
Cc: <Basavaraj.Natikar@amd.com>, <linux-usb@vger.kernel.org>,
Sanjay R Mehta <sanju.mehta@amd.com>
Subject: [PATCH v2 2/4] thunderbolt: Handle ring interrupt by reading intr status
Date: Tue, 3 Aug 2021 07:34:54 -0500 [thread overview]
Message-ID: <1627994096-99972-3-git-send-email-Sanju.Mehta@amd.com> (raw)
In-Reply-To: <1627994096-99972-1-git-send-email-Sanju.Mehta@amd.com>
From: Sanjay R Mehta <sanju.mehta@amd.com>
As per USB4 spec by default "Disable ISR Auto-Clear" bit is set to 0,
and the Tx/Rx ring interrupt status is needs to be cleared.
Hence handling it by reading the "Interrupt status" register in the ISR.
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
---
drivers/thunderbolt/nhi.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c
index ef01aa6..7ad2202 100644
--- a/drivers/thunderbolt/nhi.c
+++ b/drivers/thunderbolt/nhi.c
@@ -373,11 +373,25 @@ void tb_ring_poll_complete(struct tb_ring *ring)
}
EXPORT_SYMBOL_GPL(tb_ring_poll_complete);
+static void check_and_clear_intr_status(struct tb_ring *ring)
+{
+ if (!(ring->nhi->pdev->vendor == PCI_VENDOR_ID_INTEL)) {
+ if (ring->is_tx)
+ ioread32(ring->nhi->iobase
+ + REG_RING_NOTIFY_BASE);
+ else
+ ioread32(ring->nhi->iobase
+ + REG_RING_NOTIFY_BASE
+ + 4 * (ring->nhi->hop_count / 32));
+ }
+}
+
static irqreturn_t ring_msix(int irq, void *data)
{
struct tb_ring *ring = data;
spin_lock(&ring->nhi->lock);
+ check_and_clear_intr_status(ring);
spin_lock(&ring->lock);
__ring_interrupt(ring);
spin_unlock(&ring->lock);
--
2.7.4
next prev parent reply other threads:[~2021-08-03 12:35 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-03 12:34 [PATCH v2 0/4] Added some bug fixes for USB4 Sanjay R Mehta
2021-08-03 12:34 ` [PATCH v2 1/4] thunderbolt: Intel controller uses BIT(2) for intr auto Sanjay R Mehta
2021-08-03 12:34 ` Sanjay R Mehta [this message]
2021-08-04 15:48 ` [PATCH v2 2/4] thunderbolt: Handle ring interrupt by reading intr status Mika Westerberg
2021-08-05 12:56 ` Mika Westerberg
2021-08-05 13:06 ` Sanjay R Mehta
2021-08-05 14:20 ` Mika Westerberg
2021-08-05 12:59 ` Sanjay R Mehta
2021-08-05 14:19 ` Mika Westerberg
2021-08-05 14:46 ` Mika Westerberg
2021-08-05 18:03 ` Sanjay R Mehta
2021-08-03 12:34 ` [PATCH v2 3/4] thunderbolt: Skip port init for control adapter(0) Sanjay R Mehta
2021-08-03 12:34 ` [PATCH v2 4/4] thunderbolt: Fix port linking by checking all adapters Sanjay R Mehta
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