From: Crystal Guo <crystal.guo@mediatek.com>
To: <wim@linux-watchdog.org>, <linux@roeck-us.net>,
<robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: <srv_heupstream@mediatek.com>,
<linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-watchdog@vger.kernel.org>,
<seiya.wang@mediatek.com>, Crystal Guo <crystal.guo@mediatek.com>
Subject: [v6,3/4] dt-binding: mt8192: add toprgu reset-controller head file
Date: Wed, 14 Oct 2020 21:19:35 +0800 [thread overview]
Message-ID: <20201014131936.20584-4-crystal.guo@mediatek.com> (raw)
In-Reply-To: <20201014131936.20584-1-crystal.guo@mediatek.com>
add toprgu reset-controller head file for MT8192 platform
Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
---
.../reset-controller/mt8192-resets.h | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
create mode 100644 include/dt-bindings/reset-controller/mt8192-resets.h
diff --git a/include/dt-bindings/reset-controller/mt8192-resets.h b/include/dt-bindings/reset-controller/mt8192-resets.h
new file mode 100644
index 000000000000..be9a7ca245b9
--- /dev/null
+++ b/include/dt-bindings/reset-controller/mt8192-resets.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Yong Liang <yong.liang@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8192
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8192
+
+#define MT8192_TOPRGU_MM_SW_RST 1
+#define MT8192_TOPRGU_MFG_SW_RST 2
+#define MT8192_TOPRGU_VENC_SW_RST 3
+#define MT8192_TOPRGU_VDEC_SW_RST 4
+#define MT8192_TOPRGU_IMG_SW_RST 5
+#define MT8192_TOPRGU_MD_SW_RST 7
+#define MT8192_TOPRGU_CONN_SW_RST 9
+#define MT8192_TOPRGU_CONN_MCU_SW_RST 12
+#define MT8192_TOPRGU_IPU0_SW_RST 14
+#define MT8192_TOPRGU_IPU1_SW_RST 15
+#define MT8192_TOPRGU_AUDIO_SW_RST 17
+#define MT8192_TOPRGU_CAMSYS_SW_RST 18
+#define MT8192_TOPRGU_MJC_SW_RST 19
+#define MT8192_TOPRGU_C2K_S2_SW_RST 20
+#define MT8192_TOPRGU_C2K_SW_RST 21
+#define MT8192_TOPRGU_PERI_SW_RST 22
+#define MT8192_TOPRGU_PERI_AO_SW_RST 23
+
+#define MT8192_TOPRGU_SW_RST_NUM 23
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */
--
2.18.0
next prev parent reply other threads:[~2020-10-14 13:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 13:19 [v6,0/4] watchdog: mt8192: add wdt support Crystal Guo
2020-10-14 13:19 ` [v6,1/4] dt-binding: mediatek: watchdog: fix the description of compatible Crystal Guo
2020-10-14 13:19 ` [v6,2/4] dt-binding: mediatek: mt8192: update mtk-wdt document Crystal Guo
2020-11-16 12:27 ` Crystal Guo
2020-12-21 0:59 ` Nicolas Boichat
2020-12-26 8:55 ` Crystal Guo
2021-01-23 18:21 ` Guenter Roeck
2020-10-14 13:19 ` Crystal Guo [this message]
2020-10-14 13:19 ` [v6,4/4] watchdog: mt8192: add wdt support Crystal Guo
2021-01-23 18:27 ` Guenter Roeck
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