From: <Ajay.Kathat@microchip.com>
To: <davidm@egauge.net>, <linux-wireless@vger.kernel.org>
Cc: <Claudiu.Beznea@microchip.com>
Subject: Re: [PATCH 4/4] wilc1000: Add support for enabling CRC
Date: Thu, 25 Feb 2021 04:58:59 +0000 [thread overview]
Message-ID: <56ff1617-8d39-9dbd-0055-b3cee6d458ff@microchip.com> (raw)
In-Reply-To: <33012e779ee172e688cac2e710fa1ddab68fc611.camel@egauge.net>
Hi David,
On 24/02/21 9:17 pm, David Mosberger-Tang wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Ajay,
>
> On Wed, 2021-02-24 at 13:35 +0000, Ajay.Kathat@microchip.com wrote:
>>
>> One more observation.
>> I am not clear if the below block is really needed. Have you faced any
>> issue here and did the below logic of skipping data helped to come out
>> of it. Also checking the limit of 16384(2*8KB) byte looks odd when the
>> max limit for data packet is around 8KB. Am I missing something here.
>>
>>> +
>>> + {
>>> + u8 byte;
>>> + int i;
>>> +
>>> + for (i = 0; i < 16384; ++i) {
>>> + byte = 0;
>>> + wilc_spi_rx(wilc, &byte, 1);
>>> + if (!byte)
>>> + break;
>>> + }
>>> + }
>
> Ouch, that's definitely not supposed to be there! It's left-over debug
> code from when I was tracking down the power-save issue. Not sure how
> I missed that. Thanks for catching it and being so gentle about it!
>
> How do I fix this best? Do I resend the entire patch series or is it
> OK to create a V2 of just this last patch?
>
It's better to resubmit the complete patch series v2, as it would be
convenient for Kalle to apply the patches in order.
Regards,
Ajay
next prev parent reply other threads:[~2021-02-25 5:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-24 5:51 [PATCH 1/4] wilc1000: Make SPI transfers work at 48MHz David Mosberger-Tang
2021-02-24 5:51 ` [PATCH 2/4] wilc1000: Introduce symbolic names for SPI protocol register David Mosberger-Tang
2021-02-24 5:51 ` [PATCH 3/4] wilc1000: Check for errors at end of DMA write David Mosberger-Tang
2021-02-25 8:27 ` Kalle Valo
2021-02-25 18:10 ` David Mosberger-Tang
2021-02-24 5:52 ` [PATCH 4/4] wilc1000: Add support for enabling CRC David Mosberger-Tang
2021-02-24 10:01 ` Ajay.Kathat
2021-02-24 16:25 ` David Mosberger-Tang
2021-02-25 4:50 ` Ajay.Kathat
2021-02-24 13:35 ` Ajay.Kathat
2021-02-24 15:47 ` David Mosberger-Tang
2021-02-25 4:58 ` Ajay.Kathat [this message]
2021-02-25 8:25 ` Kalle Valo
2021-02-24 21:19 ` Julian Calaby
2021-02-24 23:36 ` David Mosberger-Tang
2021-02-25 5:56 ` Ajay.Kathat
2021-02-25 8:22 ` Kalle Valo
2021-02-25 11:03 ` Ajay.Kathat
2021-02-26 7:09 ` Kalle Valo
2021-02-27 17:29 ` [PATCH v2 1/4] wilc1000: Make SPI transfers work at 48MHz David Mosberger-Tang
2021-04-17 17:48 ` Kalle Valo
2021-02-27 17:29 ` [PATCH v2 2/4] wilc1000: Introduce symbolic names for SPI protocol register David Mosberger-Tang
2021-02-27 17:29 ` [PATCH v2 3/4] wilc1000: Check for errors at end of DMA write David Mosberger-Tang
2021-02-27 17:31 ` [PATCH v2 4/4] wilc1000: Add support for enabling CRC David Mosberger-Tang
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