From: David Mosberger-Tang <davidm@egauge.net>
To: Ajay.Kathat@microchip.com, linux-wireless@vger.kernel.org
Cc: Claudiu.Beznea@microchip.com
Subject: Re: [PATCH 4/4] wilc1000: Add support for enabling CRC
Date: Wed, 24 Feb 2021 09:25:36 -0700 [thread overview]
Message-ID: <de208903375a13c31717c668f83e71b3f0f9d6f5.camel@egauge.net> (raw)
In-Reply-To: <f58ec951-4ab4-2ed4-78d4-96ebb448f494@microchip.com>
On Wed, 2021-02-24 at 10:01 +0000, Ajay.Kathat@microchip.com wrote:
> This patch series also looks okay to me. I just have one input which is
> captured below.
>
> We need to disable both crc7 and crc16 while retrying on failure attempt
> by adding below line
>
> spi_priv->crc16_enabled = false;
Ah, you're right. We can always probe with CRC16 off since the chip
returns valid register data regardless of whether crc16_enabled is
true or false. I'm thinking something like this:
spi_priv->crc16_enabled = false; // ignore CRC16 during CRC-
detection
for (crc7 = 1; crc7 >= 0; --crc7) {
spi_priv->crc7_enabled = crc7;
ret = spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET,
®);
if (ret == 0)
break;
}
if (ret) {
dev_err(&spi->dev, "Failed with all possible CRC
settings.\n");
return ret;
}
> By default the CRC checks are disabled, so if the kernel module is
> reloaded it should reattempt with both disabled.
Are you sure about that? My test devices resets into:
PROTOCOL_REG = 0x2e
which should be CRC7 and CRC16 on, right?
--david
next prev parent reply other threads:[~2021-02-24 16:26 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-24 5:51 [PATCH 1/4] wilc1000: Make SPI transfers work at 48MHz David Mosberger-Tang
2021-02-24 5:51 ` [PATCH 2/4] wilc1000: Introduce symbolic names for SPI protocol register David Mosberger-Tang
2021-02-24 5:51 ` [PATCH 3/4] wilc1000: Check for errors at end of DMA write David Mosberger-Tang
2021-02-25 8:27 ` Kalle Valo
2021-02-25 18:10 ` David Mosberger-Tang
2021-02-24 5:52 ` [PATCH 4/4] wilc1000: Add support for enabling CRC David Mosberger-Tang
2021-02-24 10:01 ` Ajay.Kathat
2021-02-24 16:25 ` David Mosberger-Tang [this message]
2021-02-25 4:50 ` Ajay.Kathat
2021-02-24 13:35 ` Ajay.Kathat
2021-02-24 15:47 ` David Mosberger-Tang
2021-02-25 4:58 ` Ajay.Kathat
2021-02-25 8:25 ` Kalle Valo
2021-02-24 21:19 ` Julian Calaby
2021-02-24 23:36 ` David Mosberger-Tang
2021-02-25 5:56 ` Ajay.Kathat
2021-02-25 8:22 ` Kalle Valo
2021-02-25 11:03 ` Ajay.Kathat
2021-02-26 7:09 ` Kalle Valo
2021-02-27 17:29 ` [PATCH v2 1/4] wilc1000: Make SPI transfers work at 48MHz David Mosberger-Tang
2021-04-17 17:48 ` Kalle Valo
2021-02-27 17:29 ` [PATCH v2 2/4] wilc1000: Introduce symbolic names for SPI protocol register David Mosberger-Tang
2021-02-27 17:29 ` [PATCH v2 3/4] wilc1000: Check for errors at end of DMA write David Mosberger-Tang
2021-02-27 17:31 ` [PATCH v2 4/4] wilc1000: Add support for enabling CRC David Mosberger-Tang
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