From: "Alastair D'Silva" <alastair@au1.ibm.com>
To: alastair@d-silva.org
Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org,
Paul Mackerras <paulus@samba.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Thomas Gleixner <tglx@linutronix.de>,
linuxppc-dev@lists.ozlabs.org,
Allison Randal <allison@lohutok.net>
Subject: [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
Date: Wed, 21 Aug 2019 10:19:27 +1000 [thread overview]
Message-ID: <20190821001929.4253-1-alastair@au1.ibm.com> (raw)
From: Alastair D'Silva <alastair@d-silva.org>
The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of the assembler to C, is
too invasive for stable. This patch is a minimal fix to address the issue in
assembler.
This patch applies cleanly to v5.2, v4.19 & v4.14.
When calling flush_(inval_)dcache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Changelog:
v2
- Add related upstream commit
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
---
arch/powerpc/kernel/misc_64.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 1ad4089dd110..d4d096f80f4b 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -130,7 +130,7 @@ _GLOBAL_TOC(flush_dcache_range)
subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block size */
- srw. r8,r8,r9 /* compute line count */
+ srd. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
mtctr r8
0: dcbst 0,r6
@@ -148,7 +148,7 @@ _GLOBAL(flush_inval_dcache_range)
subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
- srw. r8,r8,r9 /* compute line count */
+ srd. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
sync
isync
--
2.21.0
next reply other threads:[~2019-08-21 0:21 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 0:19 Alastair D'Silva [this message]
2019-08-26 16:50 ` [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB Greg Kroah-Hartman
2019-08-26 20:08 ` Christophe Leroy
2019-08-27 6:18 ` Greg Kroah-Hartman
2019-08-27 1:50 ` Michael Ellerman
2019-08-27 6:19 ` Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 4.14-stable tree gregkh
2019-08-27 6:19 ` [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB Greg Kroah-Hartman
2019-08-27 6:19 ` Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 4.19-stable tree gregkh
2019-08-27 6:20 ` Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 5.2-stable tree gregkh
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