From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alastair D'Silva <alastair@au1.ibm.com>
Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org,
Paul Mackerras <paulus@samba.org>,
alastair@d-silva.org, Thomas Gleixner <tglx@linutronix.de>,
linuxppc-dev@lists.ozlabs.org,
Allison Randal <allison@lohutok.net>
Subject: Re: [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
Date: Mon, 26 Aug 2019 22:08:26 +0200 [thread overview]
Message-ID: <bae6de93-f135-68c5-9118-a0732e6de301@c-s.fr> (raw)
In-Reply-To: <20190826165021.GB9305@kroah.com>
Le 26/08/2019 à 18:50, Greg Kroah-Hartman a écrit :
> On Wed, Aug 21, 2019 at 10:19:27AM +1000, Alastair D'Silva wrote:
>> From: Alastair D'Silva <alastair@d-silva.org>
>>
>> The upstream commit:
>> 22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
>> has a similar effect, but since it is a rewrite of the assembler to C, is
>> too invasive for stable. This patch is a minimal fix to address the issue in
>> assembler.
>>
>> This patch applies cleanly to v5.2, v4.19 & v4.14.
>>
>> When calling flush_(inval_)dcache_range with a size >4GB, we were masking
>> off the upper 32 bits, so we would incorrectly flush a range smaller
>> than intended.
>>
>> This patch replaces the 32 bit shifts with 64 bit ones, so that
>> the full size is accounted for.
>>
>> Changelog:
>> v2
>> - Add related upstream commit
>>
>> Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
>> ---
>> arch/powerpc/kernel/misc_64.S | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
>> index 1ad4089dd110..d4d096f80f4b 100644
>> --- a/arch/powerpc/kernel/misc_64.S
>> +++ b/arch/powerpc/kernel/misc_64.S
>> @@ -130,7 +130,7 @@ _GLOBAL_TOC(flush_dcache_range)
>> subf r8,r6,r4 /* compute length */
>> add r8,r8,r5 /* ensure we get enough */
>> lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block size */
>> - srw. r8,r8,r9 /* compute line count */
>> + srd. r8,r8,r9 /* compute line count */
>> beqlr /* nothing to do? */
>> mtctr r8
>> 0: dcbst 0,r6
>> @@ -148,7 +148,7 @@ _GLOBAL(flush_inval_dcache_range)
>> subf r8,r6,r4 /* compute length */
>> add r8,r8,r5 /* ensure we get enough */
>> lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
>> - srw. r8,r8,r9 /* compute line count */
>> + srd. r8,r8,r9 /* compute line count */
>> beqlr /* nothing to do? */
>> sync
>> isync
>
> I need an ack from the powerpc maintainer(s) before I can take this.
I think you already got an ack (on v1). See
https://patchwork.ozlabs.org/patch/1147403/#2239663
Christophe
next prev parent reply other threads:[~2019-08-26 20:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 0:19 [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB Alastair D'Silva
2019-08-26 16:50 ` Greg Kroah-Hartman
2019-08-26 20:08 ` Christophe Leroy [this message]
2019-08-27 6:18 ` Greg Kroah-Hartman
2019-08-27 1:50 ` Michael Ellerman
2019-08-27 6:19 ` Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 4.14-stable tree gregkh
2019-08-27 6:19 ` [PATCH v2] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB Greg Kroah-Hartman
2019-08-27 6:19 ` Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 4.19-stable tree gregkh
2019-08-27 6:20 ` Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 5.2-stable tree gregkh
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