* [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware register dt entry
@ 2022-03-01 11:12 Shaik Sajida Bhanu
2022-03-01 11:35 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Shaik Sajida Bhanu @ 2022-03-01 11:12 UTC (permalink / raw)
To: adrian.hunter, ulf.hansson, robh+dt
Cc: quic_asutoshd, quic_rampraka, quic_pragalla, quic_sartgarg,
quic_nitirawa, quic_sayalil, agross, bjorn.andersson,
krzysztof.kozlowski, linux-arm-msm, devicetree, linux-kernel,
Shaik Sajida Bhanu
Add GCC hardware register dt entry for eMMC and SD card.
Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index c07765d..2b8461d 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -881,6 +881,9 @@
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
+ /* Add dt entry for gcc hw reset */
+ resets = <&gcc GCC_SDCC1_BCR>;
+ reset-names = "core_reset";
sdhc1_opp_table: opp-table {
compatible = "operating-points-v2";
@@ -2686,6 +2689,9 @@
qcom,dll-config = <0x0007642c>;
+ /* Add dt entry for gcc hw reset */
+ resets = <&gcc GCC_SDCC2_BCR>;
+ reset-names = "core_reset";
sdhc2_opp_table: opp-table {
compatible = "operating-points-v2";
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware register dt entry
2022-03-01 11:12 [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware register dt entry Shaik Sajida Bhanu
@ 2022-03-01 11:35 ` Krzysztof Kozlowski
2022-03-09 9:12 ` Sajida Bhanu (Temp) (QUIC)
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-01 11:35 UTC (permalink / raw)
To: Shaik Sajida Bhanu, adrian.hunter, ulf.hansson, robh+dt
Cc: quic_asutoshd, quic_rampraka, quic_pragalla, quic_sartgarg,
quic_nitirawa, quic_sayalil, agross, bjorn.andersson,
linux-arm-msm, devicetree, linux-kernel
On 01/03/2022 12:12, Shaik Sajida Bhanu wrote:
> Add GCC hardware register dt entry for eMMC and SD card.
Aren't you adding reset, not a hardware register? The same in subject.
>
> Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c07765d..2b8461d 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -881,6 +881,9 @@
> mmc-hs400-1_8v;
> mmc-hs400-enhanced-strobe;
>
> + /* Add dt entry for gcc hw reset */
This comment seems unrelated and duplicating commit msg. Basically you
wrote same sentence four times: subject, commit msg and twice here...
> + resets = <&gcc GCC_SDCC1_BCR>;
> + reset-names = "core_reset";
> sdhc1_opp_table: opp-table {
> compatible = "operating-points-v2";
>
> @@ -2686,6 +2689,9 @@
>
> qcom,dll-config = <0x0007642c>;
>
> + /* Add dt entry for gcc hw reset */
Ditto.
> + resets = <&gcc GCC_SDCC2_BCR>;
> + reset-names = "core_reset";
> sdhc2_opp_table: opp-table {
> compatible = "operating-points-v2";
>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware register dt entry
2022-03-01 11:35 ` Krzysztof Kozlowski
@ 2022-03-09 9:12 ` Sajida Bhanu (Temp) (QUIC)
0 siblings, 0 replies; 3+ messages in thread
From: Sajida Bhanu (Temp) (QUIC) @ 2022-03-09 9:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sajida Bhanu (Temp) (QUIC),
adrian.hunter, ulf.hansson, robh+dt
Cc: Asutosh Das (QUIC), Ram Prakash Gupta (QUIC),
Pradeep Pragallapati (QUIC), Sarthak Garg (QUIC),
Nitin Rawat (QUIC), Sayali Lokhande (QUIC),
agross, bjorn.andersson, linux-arm-msm, devicetree, linux-kernel
Hi,
Thanks for the review.
Please find the inline comments.
Thanks,
Sajida
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Sent: Tuesday, March 1, 2022 5:06 PM
> To: Sajida Bhanu (Temp) (QUIC) <quic_c_sbhanu@quicinc.com>;
> adrian.hunter@intel.com; ulf.hansson@linaro.org; robh+dt@kernel.org
> Cc: Asutosh Das (QUIC) <quic_asutoshd@quicinc.com>; Ram Prakash Gupta
> (QUIC) <quic_rampraka@quicinc.com>; Pradeep Pragallapati (QUIC)
> <quic_pragalla@quicinc.com>; Sarthak Garg (QUIC)
> <quic_sartgarg@quicinc.com>; Nitin Rawat (QUIC)
> <quic_nitirawa@quicinc.com>; Sayali Lokhande (QUIC)
> <quic_sayalil@quicinc.com>; agross@kernel.org;
> bjorn.andersson@linaro.org; linux-arm-msm@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware
> register dt entry
>
> On 01/03/2022 12:12, Shaik Sajida Bhanu wrote:
> > Add GCC hardware register dt entry for eMMC and SD card.
>
> Aren't you adding reset, not a hardware register? The same in subject.
>
Sure will update.
> >
> > Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
> > ---
> > arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > index c07765d..2b8461d 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > @@ -881,6 +881,9 @@
> > mmc-hs400-1_8v;
> > mmc-hs400-enhanced-strobe;
> >
> > + /* Add dt entry for gcc hw reset */
>
> This comment seems unrelated and duplicating commit msg. Basically you
> wrote same sentence four times: subject, commit msg and twice here...
Sure will update
>
> > + resets = <&gcc GCC_SDCC1_BCR>;
> > + reset-names = "core_reset";
> > sdhc1_opp_table: opp-table {
> > compatible = "operating-points-v2";
> >
> > @@ -2686,6 +2689,9 @@
> >
> > qcom,dll-config = <0x0007642c>;
> >
> > + /* Add dt entry for gcc hw reset */
>
> Ditto.
>
> > + resets = <&gcc GCC_SDCC2_BCR>;
> > + reset-names = "core_reset";
> > sdhc2_opp_table: opp-table {
> > compatible = "operating-points-v2";
> >
>
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-03-09 9:12 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-01 11:12 [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware register dt entry Shaik Sajida Bhanu
2022-03-01 11:35 ` Krzysztof Kozlowski
2022-03-09 9:12 ` Sajida Bhanu (Temp) (QUIC)
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).