* [PATCH 0/2] irqchip: dw-apb-ictl: add irq_set_affinity support
@ 2015-07-03 14:32 Jisheng Zhang
2015-07-03 14:32 ` [PATCH 1/2] irqchip: dw-apb-ictl: add private data structure Jisheng Zhang
2015-07-03 14:32 ` [PATCH 2/2] irqchip: dw-apb-ictl: add irq_set_affinity support Jisheng Zhang
0 siblings, 2 replies; 3+ messages in thread
From: Jisheng Zhang @ 2015-07-03 14:32 UTC (permalink / raw)
To: tglx, jason; +Cc: linux-kernel, linux-arm-kernel, Jisheng Zhang
On Marvell Berlin SoCs, the cpu's local timer is shutdown when the cpu
goes to a deep idle state, then the timer framework will be notified to
use a broadcast timer instead. The broadcast timer uses dw-apb-ictl as
interrupt chip, these patches try to add irq_set_affinity support so
that the going to deep idle state cpu can set the interrupt affinity of the
broadcast interrupt to avoid unnecessary wakeups and IPIs.
Jisheng Zhang (2):
irqchip: dw-apb-ictl: add private data structure
irqchip: dw-apb-ictl: add irq_set_affinity support
drivers/irqchip/irq-dw-apb-ictl.c | 47 ++++++++++++++++++++++++++++++++++-----
1 file changed, 42 insertions(+), 5 deletions(-)
--
2.1.4
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] irqchip: dw-apb-ictl: add private data structure
2015-07-03 14:32 [PATCH 0/2] irqchip: dw-apb-ictl: add irq_set_affinity support Jisheng Zhang
@ 2015-07-03 14:32 ` Jisheng Zhang
2015-07-03 14:32 ` [PATCH 2/2] irqchip: dw-apb-ictl: add irq_set_affinity support Jisheng Zhang
1 sibling, 0 replies; 3+ messages in thread
From: Jisheng Zhang @ 2015-07-03 14:32 UTC (permalink / raw)
To: tglx, jason; +Cc: linux-kernel, linux-arm-kernel, Jisheng Zhang
This patch adds struct dw_apb_ictl_priv definition, now it only has one
member: the irq domain. Then make the generic irq chip gc->private to point
to the struct. This is to prepare for the next patch which will implement
irq_set_affinity.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
drivers/irqchip/irq-dw-apb-ictl.c | 26 +++++++++++++++++++++-----
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
index 53bb732..8bef7f7 100644
--- a/drivers/irqchip/irq-dw-apb-ictl.c
+++ b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -16,6 +16,7 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
+#include <linux/slab.h>
#include "irqchip.h"
@@ -26,11 +27,16 @@
#define APB_INT_FINALSTATUS_L 0x30
#define APB_INT_FINALSTATUS_H 0x34
+struct dw_apb_ictl_priv {
+ struct irq_domain *domain;
+};
+
static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = irq_get_chip(irq);
struct irq_chip_generic *gc = irq_get_handler_data(irq);
- struct irq_domain *d = gc->private;
+ struct dw_apb_ictl_priv *priv = gc->private;
+ struct irq_domain *d = priv->domain;
u32 stat;
int n;
@@ -71,27 +77,34 @@ static int __init dw_apb_ictl_init(struct device_node *np,
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
struct resource r;
struct irq_domain *domain;
+ struct dw_apb_ictl_priv *priv;
struct irq_chip_generic *gc;
void __iomem *iobase;
int ret, nrirqs, irq;
u32 reg;
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
/* Map the parent interrupt for the chained handler */
irq = irq_of_parse_and_map(np, 0);
if (irq <= 0) {
pr_err("%s: unable to parse irq\n", np->full_name);
- return -EINVAL;
+ ret = -EINVAL;
+ goto err_free;
}
ret = of_address_to_resource(np, 0, &r);
if (ret) {
pr_err("%s: unable to get resource\n", np->full_name);
- return ret;
+ goto err_free;
}
if (!request_mem_region(r.start, resource_size(&r), np->full_name)) {
pr_err("%s: unable to request mem region\n", np->full_name);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto err_free;
}
iobase = ioremap(r.start, resource_size(&r));
@@ -138,7 +151,8 @@ static int __init dw_apb_ictl_init(struct device_node *np,
}
gc = irq_get_domain_generic_chip(domain, 0);
- gc->private = domain;
+ priv->domain = domain;
+ gc->private = priv;
gc->reg_base = iobase;
gc->chip_types[0].regs.mask = APB_INT_MASK_L;
@@ -164,6 +178,8 @@ err_unmap:
iounmap(iobase);
err_release:
release_mem_region(r.start, resource_size(&r));
+err_free:
+ kfree(priv);
return ret;
}
IRQCHIP_DECLARE(dw_apb_ictl,
--
2.1.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] irqchip: dw-apb-ictl: add irq_set_affinity support
2015-07-03 14:32 [PATCH 0/2] irqchip: dw-apb-ictl: add irq_set_affinity support Jisheng Zhang
2015-07-03 14:32 ` [PATCH 1/2] irqchip: dw-apb-ictl: add private data structure Jisheng Zhang
@ 2015-07-03 14:32 ` Jisheng Zhang
1 sibling, 0 replies; 3+ messages in thread
From: Jisheng Zhang @ 2015-07-03 14:32 UTC (permalink / raw)
To: tglx, jason; +Cc: linux-kernel, linux-arm-kernel, Jisheng Zhang
On Marvell Berlin SoCs, the cpu's local timer is shutdown when the cpu
goes to a deep idle state, then the timer framework will be notified to
use a broadcast timer instead. The broadcast timer uses dw-apb-ictl as
interrupt chip, this patch adds irq_set_affinity support so that the
going to deep idle state cpu can set the interrupt affinity of the
broadcast interrupt to avoid unnecessary wakeups and IPIs.
I believe this patch will also benefit other dw-apb-ictl users.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
drivers/irqchip/irq-dw-apb-ictl.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
index 8bef7f7..efc0aec 100644
--- a/drivers/irqchip/irq-dw-apb-ictl.c
+++ b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -29,6 +29,7 @@
struct dw_apb_ictl_priv {
struct irq_domain *domain;
+ unsigned int parent_irq;
};
static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
@@ -56,6 +57,21 @@ static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
+static int dw_apb_ictl_set_affinity(struct irq_data *d,
+ const struct cpumask *mask_val,
+ bool force)
+{
+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ struct dw_apb_ictl_priv *priv = gc->private;
+ struct irq_chip *chip = irq_get_chip(priv->parent_irq);
+ struct irq_data *data = irq_get_irq_data(priv->parent_irq);
+
+ if (chip && chip->irq_set_affinity)
+ return chip->irq_set_affinity(data, mask_val, force);
+ else
+ return -EINVAL;
+}
+
#ifdef CONFIG_PM
static void dw_apb_ictl_resume(struct irq_data *d)
{
@@ -95,6 +111,8 @@ static int __init dw_apb_ictl_init(struct device_node *np,
goto err_free;
}
+ priv->parent_irq = irq;
+
ret = of_address_to_resource(np, 0, &r);
if (ret) {
pr_err("%s: unable to get resource\n", np->full_name);
@@ -160,6 +178,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume;
+ gc->chip_types[0].chip.irq_set_affinity = dw_apb_ictl_set_affinity;
if (nrirqs > 32) {
gc->chip_types[1].regs.mask = APB_INT_MASK_H;
@@ -167,6 +186,8 @@ static int __init dw_apb_ictl_init(struct device_node *np,
gc->chip_types[1].chip.irq_mask = irq_gc_mask_set_bit;
gc->chip_types[1].chip.irq_unmask = irq_gc_mask_clr_bit;
gc->chip_types[1].chip.irq_resume = dw_apb_ictl_resume;
+ gc->chip_types[1].chip.irq_set_affinity =
+ dw_apb_ictl_set_affinity;
}
irq_set_handler_data(irq, gc);
--
2.1.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2015-07-03 14:33 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2015-07-03 14:32 ` [PATCH 2/2] irqchip: dw-apb-ictl: add irq_set_affinity support Jisheng Zhang
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