From: Purna Chandra Mandal <purna.mandal@microchip.com>
To: <linux-kernel@vger.kernel.org>
Cc: <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>,
Purna Chandra Mandal <purna.mandal@microchip.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>, <linux-clk@vger.kernel.org>
Subject: [PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.
Date: Tue, 17 May 2016 10:35:51 +0530 [thread overview]
Message-ID: <1463461560-9629-2-git-send-email-purna.mandal@microchip.com> (raw)
In-Reply-To: <1463461560-9629-1-git-send-email-purna.mandal@microchip.com>
Optional SOSC is an external fixed clock running at 32768HZ.
So Initialize SOSC rate as per PIC32MZDA datasheet.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---
Note: Please pull this complete series through the MIPS tree.
---
drivers/clk/microchip/clk-pic32mzda.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/microchip/clk-pic32mzda.c b/drivers/clk/microchip/clk-pic32mzda.c
index 020a29a..210694b 100644
--- a/drivers/clk/microchip/clk-pic32mzda.c
+++ b/drivers/clk/microchip/clk-pic32mzda.c
@@ -118,6 +118,7 @@ static const struct pic32_sec_osc_data sosc_clk = {
.status_reg = 0x1d0,
.enable_mask = BIT(1),
.status_mask = BIT(4),
+ .fixed_rate = 32768,
.init_data = {
.name = "sosc_clk",
.parent_names = NULL,
--
1.8.3.1
next prev parent reply other threads:[~2016-05-17 5:08 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-17 5:05 [PATCH 01/11] clk: microchip: use readl_poll_timeout() in pbclk_set_rate() Purna Chandra Mandal
2016-05-17 5:05 ` Purna Chandra Mandal [this message]
2016-08-24 23:05 ` [PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA Stephen Boyd
2016-05-17 5:05 ` [PATCH 03/11] MIPS: pic32mzda: fix getting timer clock rate Purna Chandra Mandal
2016-05-17 12:30 ` Ralf Baechle
2016-05-25 16:02 ` Harvey Hunt
2016-06-02 5:05 ` Purna Chandra Mandal
2016-05-17 5:05 ` [PATCH 04/11] irqchip: irq-pic32-evic: Fix bug with external interrupts Purna Chandra Mandal
2016-05-17 8:09 ` Marc Zyngier
2016-05-17 5:05 ` [PATCH 05/11] serial: pic32_uart: Fix double free of 'sport->irq_fault_name' Purna Chandra Mandal
2016-05-17 5:05 ` [PATCH 06/11] dt/bindings: Correct clk binding example for PIC32 SDHCI Purna Chandra Mandal
2016-05-18 16:50 ` Rob Herring
2016-05-17 5:05 ` [PATCH 07/11] dt/bindings: Correct clk binding example for PIC32 pinctrl Purna Chandra Mandal
2016-05-18 16:50 ` Rob Herring
2016-05-26 8:37 ` Linus Walleij
2016-05-17 5:05 ` [PATCH 08/11] dt/bindings: Correct clk binding example for PIC32 serial Purna Chandra Mandal
2016-05-18 16:51 ` Rob Herring
2016-05-17 5:05 ` [PATCH 09/11] dt/bindings: Correct clk binding example for PIC32 DMT Purna Chandra Mandal
2016-05-18 16:51 ` Rob Herring
2016-05-17 5:05 ` [PATCH 10/11] dt/bindings: Correct clk binding example for PIC32 WDT Purna Chandra Mandal
2016-05-18 16:52 ` Rob Herring
2016-05-17 5:06 ` [PATCH 11/11] dt/bindings: Correct clk binding example for PIC32 gpio Purna Chandra Mandal
2016-05-18 16:52 ` Rob Herring
2016-05-26 8:38 ` Linus Walleij
2016-08-24 23:05 ` [PATCH 01/11] clk: microchip: use readl_poll_timeout() in pbclk_set_rate() Stephen Boyd
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