From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Borislav Petkov <bp@suse.de>
Cc: Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
Brian Gerst <brgerst@gmail.com>,
Chris Metcalf <cmetcalf@mellanox.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
Jonathan Corbet <corbet@lwn.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
Alexandre Julliard <julliard@winehq.org>,
Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Shuah Khan <shuah@kernel.org>,
linux-kernel@vger.kernel.org, x86@kernel.org,
linux-msdos@vger.kernel.org, wine-devel@winehq.org,
Adam Buchbinder <adam.buchbinder@gmail.com>,
Colin Ian King <colin.king@canonical.com>,
Lorenzo Stoakes <lstoakes@gmail.com>,
Qiaowei Ren <qiaowei.ren@intel.com>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kees Cook <keescook@chromium.org>,
Thomas Garnier <thgarnie@google.com>,
Dmitry Vyukov <dvyukov@google.com>
Subject: Re: [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses
Date: Wed, 26 Apr 2017 20:33:46 -0700 [thread overview]
Message-ID: <1493264026.36058.94.camel@ranerica-desktop> (raw)
In-Reply-To: <20170425135150.5sk4kwaw2qrsxre3@pd.tnic>
On Tue, 2017-04-25 at 15:51 +0200, Borislav Petkov wrote:
> On Tue, Mar 07, 2017 at 04:32:45PM -0800, Ricardo Neri wrote:
> > The 32-bit and 64-bit address encodings are identical. This means that we
> > can use the same function in both cases. In order to reuse the function for
> > 32-bit address encodings, we must sign-extend our 32-bit signed operands to
> > 64-bit signed variables (only for 64-bit builds). To decide on whether sign
> > extension is needed, we rely on the address size as given by the
> > instruction structure.
> >
> > Lastly, before computing the linear address, we must truncate our signed
> > 64-bit signed effective address if the address size is 32-bit.
> >
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
> > Cc: Colin Ian King <colin.king@canonical.com>
> > Cc: Lorenzo Stoakes <lstoakes@gmail.com>
> > Cc: Qiaowei Ren <qiaowei.ren@intel.com>
> > Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
> > Cc: Masami Hiramatsu <mhiramat@kernel.org>
> > Cc: Adrian Hunter <adrian.hunter@intel.com>
> > Cc: Kees Cook <keescook@chromium.org>
> > Cc: Thomas Garnier <thgarnie@google.com>
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Cc: Borislav Petkov <bp@suse.de>
> > Cc: Dmitry Vyukov <dvyukov@google.com>
> > Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
> > Cc: x86@kernel.org
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> > ---
> > arch/x86/lib/insn-eval.c | 44 ++++++++++++++++++++++++++++++++------------
> > 1 file changed, 32 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
> > index edb360f..a9a1704 100644
> > --- a/arch/x86/lib/insn-eval.c
> > +++ b/arch/x86/lib/insn-eval.c
> > @@ -559,6 +559,15 @@ int insn_get_reg_offset_sib_index(struct insn *insn, struct pt_regs *regs)
> > return get_reg_offset(insn, regs, REG_TYPE_INDEX);
> > }
> >
> > +static inline long __to_signed_long(unsigned long val, int long_bytes)
> > +{
> > +#ifdef CONFIG_X86_64
> > + return long_bytes == 4 ? (long)((int)((val) & 0xffffffff)) : (long)val;
>
> I don't think this always works as expected:
>
> ---
> typedef unsigned int u32;
> typedef unsigned long u64;
>
> int main()
> {
> u64 v = 0x1ffffffff;
>
> printf("v: %ld, 0x%lx, %ld\n", v, v, (long)((int)((v) & 0xffffffff)));
>
> return 0;
> }
> --
> ...
>
> v: 8589934591, 0x1ffffffff, -1
>
> Now, this should not happen on 32-bit because unsigned long is 32-bit
> there but can that happen on 64-bit?
This is the reason I check the value of long_bytes. If long_bytes is not
4, being the only other possible value 8 (perhaps I need to issue an
error when the value is not any of these values), the cast is simply
(long)val. I modified your test program with:
printf("v: %ld, 0x%lx, %ld, %ld\n", v, v, (long)((int)((v) &
0xffffffff)), (long)v);
and I get:
v: 8589934591, 0x1ffffffff, -1, 8589934591.
Am I missing something?
>
> > +#else
> > + return (long)val;
> > +#endif
> > +}
> > +
> > /*
> > * return the address being referenced be instruction
> > * for rm=3 returning the content of the rm reg
> > @@ -567,19 +576,21 @@ int insn_get_reg_offset_sib_index(struct insn *insn, struct pt_regs *regs)
> > void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs)
> > {
> > unsigned long linear_addr, seg_base_addr;
> > - long eff_addr, base, indx;
> > - int addr_offset, base_offset, indx_offset;
> > + long eff_addr, base, indx, tmp;
> > + int addr_offset, base_offset, indx_offset, addr_bytes;
> > insn_byte_t sib;
> >
> > insn_get_modrm(insn);
> > insn_get_sib(insn);
> > sib = insn->sib.value;
> > + addr_bytes = insn->addr_bytes;
> >
> > if (X86_MODRM_MOD(insn->modrm.value) == 3) {
> > addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM);
> > if (addr_offset < 0)
> > goto out_err;
> > - eff_addr = regs_get_register(regs, addr_offset);
> > + tmp = regs_get_register(regs, addr_offset);
> > + eff_addr = __to_signed_long(tmp, addr_bytes);
>
> This repeats throughout the function so it begs to be a separate:
>
> get_mem_addr()
>
> or so.
Yes, the same pattern is used in all places except when using register
operands (ModRM.rm == 11b). I will look into putting it in a function.
>
> > seg_base_addr = insn_get_seg_base(regs, insn, addr_offset,
> > false);
> > } else {
> > @@ -591,20 +602,24 @@ void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs)
> > * in the address computation.
> > */
> > base_offset = get_reg_offset(insn, regs, REG_TYPE_BASE);
> > - if (unlikely(base_offset == -EDOM))
> > + if (unlikely(base_offset == -EDOM)) {
> > base = 0;
> > - else if (unlikely(base_offset < 0))
> > + } else if (unlikely(base_offset < 0)) {
> > goto out_err;
> > - else
> > - base = regs_get_register(regs, base_offset);
> > + } else {
> > + tmp = regs_get_register(regs, base_offset);
> > + base = __to_signed_long(tmp, addr_bytes);
> > + }
> >
> > indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX);
> > - if (unlikely(indx_offset == -EDOM))
> > + if (unlikely(indx_offset == -EDOM)) {
> > indx = 0;
> > - else if (unlikely(indx_offset < 0))
> > + } else if (unlikely(indx_offset < 0)) {
> > goto out_err;
> > - else
> > - indx = regs_get_register(regs, indx_offset);
> > + } else {
> > + tmp = regs_get_register(regs, indx_offset);
> > + indx = __to_signed_long(tmp, addr_bytes);
> > + }
> >
> > eff_addr = base + indx * (1 << X86_SIB_SCALE(sib));
> > seg_base_addr = insn_get_seg_base(regs, insn,
> > @@ -625,13 +640,18 @@ void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs)
> > } else if (addr_offset < 0) {
> > goto out_err;
> > } else {
> > - eff_addr = regs_get_register(regs, addr_offset);
> > + tmp = regs_get_register(regs, addr_offset);
> > + eff_addr = __to_signed_long(tmp, addr_bytes);
> > }
> > seg_base_addr = insn_get_seg_base(regs, insn,
> > addr_offset, false);
> > }
> > eff_addr += insn->displacement.value;
> > }
> > + /* truncate to 4 bytes for 32-bit effective addresses */
> > + if (addr_bytes == 4)
> > + eff_addr &= 0xffffffff;
>
> Why again?
eff_addr is a long variable, which in x86_64 has 64-bit. However, in
32-bit segments the effective address is 32-bit. Thus, I discard the 32
most significant bytes.
Thanks and BR,
Ricardo
next prev parent reply other threads:[~2017-04-27 3:33 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 0:32 [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 01/21] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-04-11 21:56 ` Borislav Petkov
2017-04-26 1:40 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri
2017-04-11 11:31 ` Borislav Petkov
2017-04-26 1:39 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0 Ricardo Neri
2017-04-11 22:08 ` Borislav Petkov
2017-04-26 2:04 ` Ricardo Neri
2017-04-26 8:05 ` Borislav Petkov
2017-04-27 22:49 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 04/21] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel Ricardo Neri
2017-04-12 10:03 ` Borislav Petkov
2017-04-26 2:05 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 05/21] x86/insn-eval: Add utility functions to get register offsets Ricardo Neri
2017-04-12 16:28 ` Borislav Petkov
2017-04-26 18:13 ` Ricardo Neri
2017-04-28 10:40 ` Borislav Petkov
2017-03-08 0:32 ` [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-04-18 9:42 ` Borislav Petkov
2017-04-26 20:44 ` Ricardo Neri
2017-04-26 20:47 ` Ricardo Neri
2017-04-30 17:15 ` Borislav Petkov
2017-05-05 18:31 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 07/21] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-04-19 10:26 ` Borislav Petkov
2017-04-26 21:51 ` Ricardo Neri
2017-05-04 11:02 ` Borislav Petkov
2017-05-12 2:13 ` Ricardo Neri
2017-05-15 17:27 ` Borislav Petkov
2017-03-08 0:32 ` [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address Ricardo Neri
2017-04-20 8:25 ` Borislav Petkov
2017-04-26 22:37 ` Ricardo Neri
2017-05-05 17:19 ` Borislav Petkov
2017-05-12 2:09 ` Ricardo Neri
2017-04-26 22:52 ` Ricardo Neri
2017-05-05 17:28 ` Borislav Petkov
2017-05-12 2:06 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes Ricardo Neri
2017-04-20 13:06 ` Borislav Petkov
2017-04-27 1:07 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 10/21] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero Ricardo Neri
2017-04-21 10:52 ` Borislav Petkov
2017-04-27 1:29 ` Ricardo Neri
2017-05-07 17:20 ` Borislav Petkov
2017-05-12 1:57 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 11/21] insn/eval: Incorporate segment base in address computation Ricardo Neri
2017-04-21 14:55 ` Borislav Petkov
2017-04-27 1:31 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri
2017-04-25 13:51 ` Borislav Petkov
2017-04-27 3:33 ` Ricardo Neri [this message]
2017-05-08 11:42 ` Borislav Petkov
2017-05-12 1:55 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 13/21] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 14/21] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 15/21] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-03-08 16:08 ` Andy Lutomirski
2017-03-08 0:32 ` [v6 PATCH 16/21] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 17/21] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 18/21] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 19/21] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-03-08 15:54 ` Andy Lutomirski
2017-03-08 0:32 ` [v6 PATCH 20/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 21/21] selftests/x86: Add tests for " Ricardo Neri
2017-03-08 15:56 ` Andy Lutomirski
2017-03-10 23:38 ` Ricardo Neri
2017-03-08 14:08 ` [v6 PATCH 00/21] x86: Enable " Stas Sergeev
2017-03-08 16:06 ` Andy Lutomirski
2017-03-08 16:29 ` Stas Sergeev
2017-03-08 16:46 ` Andy Lutomirski
2017-03-08 16:53 ` Stas Sergeev
2017-03-09 1:11 ` Ricardo Neri
2017-03-09 22:05 ` Stas Sergeev
2017-03-10 2:41 ` Andy Lutomirski
2017-03-10 10:30 ` Stas Sergeev
2017-03-10 21:04 ` Andy Lutomirski
2017-03-10 21:37 ` Stas Sergeev
2017-03-09 1:15 ` Ricardo Neri
2017-03-09 22:10 ` Stas Sergeev
2017-03-10 2:39 ` Andy Lutomirski
2017-03-10 11:33 ` Stas Sergeev
2017-03-10 14:17 ` Andy Lutomirski
2017-03-11 1:22 ` Ricardo Neri
2017-03-10 23:59 ` Ricardo Neri
2017-03-13 21:25 ` Stas Sergeev
2017-03-27 23:46 ` Ricardo Neri
2017-03-28 9:38 ` Stas Sergeev
2017-03-29 4:38 ` Ricardo Neri
2017-03-29 20:55 ` Stas Sergeev
2017-03-30 5:14 ` Ricardo Neri
2017-03-30 10:10 ` Stas Sergeev
2017-03-31 1:33 ` Ricardo Neri
2017-03-31 14:11 ` Alexandre Julliard
2017-03-31 21:26 ` Stas Sergeev
2017-04-01 2:18 ` Andy Lutomirski
2017-04-04 2:02 ` Ricardo Neri
2017-04-04 6:08 ` Alexandre Julliard
2017-04-01 13:08 ` Stas Sergeev
2017-04-01 17:49 ` H. Peter Anvin
2017-04-02 15:52 ` Andy Lutomirski
2017-04-04 9:59 ` Stas Sergeev
2017-04-04 2:05 ` Ricardo Neri
2017-04-04 8:03 ` Stas Sergeev
2017-03-10 23:58 ` Ricardo Neri
2017-03-09 0:46 ` Ricardo Neri
2017-03-09 22:01 ` Stas Sergeev
2017-03-10 23:47 ` Ricardo Neri
2017-03-10 23:58 ` Stas Sergeev
2017-03-11 0:13 ` Ricardo Neri
2017-03-08 16:07 ` Andy Lutomirski
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