From: Borislav Petkov <bp@suse.de>
To: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
Brian Gerst <brgerst@gmail.com>,
Chris Metcalf <cmetcalf@mellanox.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
Jonathan Corbet <corbet@lwn.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
Alexandre Julliard <julliard@winehq.org>,
Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Shuah Khan <shuah@kernel.org>,
linux-kernel@vger.kernel.org, x86@kernel.org,
linux-msdos@vger.kernel.org, wine-devel@winehq.org,
Adam Buchbinder <adam.buchbinder@gmail.com>,
Colin Ian King <colin.king@canonical.com>,
Lorenzo Stoakes <lstoakes@gmail.com>,
Qiaowei Ren <qiaowei.ren@intel.com>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kees Cook <keescook@chromium.org>,
Thomas Garnier <thgarnie@google.com>,
Dmitry Vyukov <dvyukov@google.com>
Subject: Re: [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes
Date: Thu, 20 Apr 2017 15:06:49 +0200 [thread overview]
Message-ID: <20170420130649.ezudk44ckddznadu@pd.tnic> (raw)
In-Reply-To: <20170308003254.27833-10-ricardo.neri-calderon@linux.intel.com>
On Tue, Mar 07, 2017 at 04:32:42PM -0800, Ricardo Neri wrote:
> These functions read the default values of the address and operand sizes
> as specified in the segment descriptor. This information is determined
> from the D and L bits. Hence, it can be used for both IA-32e 64-bit and
> 32-bit legacy modes. For virtual-8086 mode, the default address and
> operand sizes are always 2 bytes.
Yeah, we tend to call that customarily 16-bit :)
> The D bit is only meaningful for code segments. Thus, these functions
> always use the code segment selector contained in regs.
>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
> Cc: Colin Ian King <colin.king@canonical.com>
> Cc: Lorenzo Stoakes <lstoakes@gmail.com>
> Cc: Qiaowei Ren <qiaowei.ren@intel.com>
> Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
> Cc: Masami Hiramatsu <mhiramat@kernel.org>
> Cc: Adrian Hunter <adrian.hunter@intel.com>
> Cc: Kees Cook <keescook@chromium.org>
> Cc: Thomas Garnier <thgarnie@google.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Borislav Petkov <bp@suse.de>
> Cc: Dmitry Vyukov <dvyukov@google.com>
> Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
> Cc: x86@kernel.org
> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> ---
> arch/x86/include/asm/insn-eval.h | 2 +
> arch/x86/lib/insn-eval.c | 80 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 82 insertions(+)
>
> diff --git a/arch/x86/include/asm/insn-eval.h b/arch/x86/include/asm/insn-eval.h
> index b201742..a0d81fc 100644
> --- a/arch/x86/include/asm/insn-eval.h
> +++ b/arch/x86/include/asm/insn-eval.h
> @@ -15,6 +15,8 @@ void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs);
> int insn_get_reg_offset_modrm_rm(struct insn *insn, struct pt_regs *regs);
> int insn_get_reg_offset_sib_base(struct insn *insn, struct pt_regs *regs);
> int insn_get_reg_offset_sib_base(struct insn *insn, struct pt_regs *regs);
> +unsigned char insn_get_seg_default_address_bytes(struct pt_regs *regs);
> +unsigned char insn_get_seg_default_operand_bytes(struct pt_regs *regs);
> unsigned long insn_get_seg_base(struct pt_regs *regs, struct insn *insn,
> int regoff, bool use_default_seg);
>
> diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
> index 383ca83..cda6c71 100644
> --- a/arch/x86/lib/insn-eval.c
> +++ b/arch/x86/lib/insn-eval.c
> @@ -421,6 +421,86 @@ unsigned long insn_get_seg_base(struct pt_regs *regs, struct insn *insn,
> }
>
> /**
> + * insn_get_seg_default_address_bytes - Obtain default address size of segment
> + * @regs: Set of registers containing the segment selector
> + *
> + * Obtain the default address size as indicated in the segment descriptor
> + * selected in regs' code segment selector. In protected mode, the default
> + * address is determined by inspecting the L and D bits of the segment
> + * descriptor. In virtual-8086 mode, the default is always two bytes.
> + *
> + * Return: Default address size of segment
0 on error.
> + */
> +unsigned char insn_get_seg_default_address_bytes(struct pt_regs *regs)
> +{
> + struct desc_struct *desc;
> + unsigned short seg;
> + int ret;
> +
> + if (v8086_mode(regs))
> + return 2;
> +
> + seg = (unsigned short)regs->cs;
> +
> + ret = get_desc(seg, &desc);
> + if (ret)
> + return 0;
> +
> + switch ((desc->l << 1) | desc->d) {
> + case 0: /* Legacy mode. 16-bit addresses. CS.L=0, CS.D=0 */
> + return 2;
> + case 1: /* Legacy mode. 32-bit addresses. CS.L=0, CS.D=1 */
> + return 4;
> + case 2: /* IA-32e 64-bit mode. 64-bit addresses. CS.L=1, CS.D=0 */
> + return 8;
> + case 3: /* Invalid setting. CS.L=1, CS.D=1 */
> + /* fall through */
> + default:
> + return 0;
> + }
> +}
> +
> +/**
> + * insn_get_seg_default_operand_bytes - Obtain default operand size of segment
> + * @regs: Set of registers containing the segment selector
> + *
> + * Obtain the default operand size as indicated in the segment descriptor
> + * selected in regs' code segment selector. In protected mode, the default
> + * operand size is determined by inspecting the L and D bits of the segment
> + * descriptor. In virtual-8086 mode, the default is always two bytes.
> + *
> + * Return: Default operand size of segment
> + */
> +unsigned char insn_get_seg_default_operand_bytes(struct pt_regs *regs)
Right, so default address and operand size always go together so I don't
think you need two separate functions.
So what I'd suggest - provided this pans out (I still haven't reviewed
the whole thing) - is to determine the operating mode of the segment:
long, legacy, etc and then return both address and operand sizes. Patch
17/21 needs them both at the same time AFAICT.
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
next prev parent reply other threads:[~2017-04-20 13:14 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 0:32 [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 01/21] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-04-11 21:56 ` Borislav Petkov
2017-04-26 1:40 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri
2017-04-11 11:31 ` Borislav Petkov
2017-04-26 1:39 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0 Ricardo Neri
2017-04-11 22:08 ` Borislav Petkov
2017-04-26 2:04 ` Ricardo Neri
2017-04-26 8:05 ` Borislav Petkov
2017-04-27 22:49 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 04/21] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel Ricardo Neri
2017-04-12 10:03 ` Borislav Petkov
2017-04-26 2:05 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 05/21] x86/insn-eval: Add utility functions to get register offsets Ricardo Neri
2017-04-12 16:28 ` Borislav Petkov
2017-04-26 18:13 ` Ricardo Neri
2017-04-28 10:40 ` Borislav Petkov
2017-03-08 0:32 ` [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-04-18 9:42 ` Borislav Petkov
2017-04-26 20:44 ` Ricardo Neri
2017-04-26 20:47 ` Ricardo Neri
2017-04-30 17:15 ` Borislav Petkov
2017-05-05 18:31 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 07/21] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-04-19 10:26 ` Borislav Petkov
2017-04-26 21:51 ` Ricardo Neri
2017-05-04 11:02 ` Borislav Petkov
2017-05-12 2:13 ` Ricardo Neri
2017-05-15 17:27 ` Borislav Petkov
2017-03-08 0:32 ` [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address Ricardo Neri
2017-04-20 8:25 ` Borislav Petkov
2017-04-26 22:37 ` Ricardo Neri
2017-05-05 17:19 ` Borislav Petkov
2017-05-12 2:09 ` Ricardo Neri
2017-04-26 22:52 ` Ricardo Neri
2017-05-05 17:28 ` Borislav Petkov
2017-05-12 2:06 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes Ricardo Neri
2017-04-20 13:06 ` Borislav Petkov [this message]
2017-04-27 1:07 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 10/21] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero Ricardo Neri
2017-04-21 10:52 ` Borislav Petkov
2017-04-27 1:29 ` Ricardo Neri
2017-05-07 17:20 ` Borislav Petkov
2017-05-12 1:57 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 11/21] insn/eval: Incorporate segment base in address computation Ricardo Neri
2017-04-21 14:55 ` Borislav Petkov
2017-04-27 1:31 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri
2017-04-25 13:51 ` Borislav Petkov
2017-04-27 3:33 ` Ricardo Neri
2017-05-08 11:42 ` Borislav Petkov
2017-05-12 1:55 ` Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 13/21] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 14/21] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 15/21] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-03-08 16:08 ` Andy Lutomirski
2017-03-08 0:32 ` [v6 PATCH 16/21] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 17/21] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 18/21] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 19/21] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-03-08 15:54 ` Andy Lutomirski
2017-03-08 0:32 ` [v6 PATCH 20/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-03-08 0:32 ` [v6 PATCH 21/21] selftests/x86: Add tests for " Ricardo Neri
2017-03-08 15:56 ` Andy Lutomirski
2017-03-10 23:38 ` Ricardo Neri
2017-03-08 14:08 ` [v6 PATCH 00/21] x86: Enable " Stas Sergeev
2017-03-08 16:06 ` Andy Lutomirski
2017-03-08 16:29 ` Stas Sergeev
2017-03-08 16:46 ` Andy Lutomirski
2017-03-08 16:53 ` Stas Sergeev
2017-03-09 1:11 ` Ricardo Neri
2017-03-09 22:05 ` Stas Sergeev
2017-03-10 2:41 ` Andy Lutomirski
2017-03-10 10:30 ` Stas Sergeev
2017-03-10 21:04 ` Andy Lutomirski
2017-03-10 21:37 ` Stas Sergeev
2017-03-09 1:15 ` Ricardo Neri
2017-03-09 22:10 ` Stas Sergeev
2017-03-10 2:39 ` Andy Lutomirski
2017-03-10 11:33 ` Stas Sergeev
2017-03-10 14:17 ` Andy Lutomirski
2017-03-11 1:22 ` Ricardo Neri
2017-03-10 23:59 ` Ricardo Neri
2017-03-13 21:25 ` Stas Sergeev
2017-03-27 23:46 ` Ricardo Neri
2017-03-28 9:38 ` Stas Sergeev
2017-03-29 4:38 ` Ricardo Neri
2017-03-29 20:55 ` Stas Sergeev
2017-03-30 5:14 ` Ricardo Neri
2017-03-30 10:10 ` Stas Sergeev
2017-03-31 1:33 ` Ricardo Neri
2017-03-31 14:11 ` Alexandre Julliard
2017-03-31 21:26 ` Stas Sergeev
2017-04-01 2:18 ` Andy Lutomirski
2017-04-04 2:02 ` Ricardo Neri
2017-04-04 6:08 ` Alexandre Julliard
2017-04-01 13:08 ` Stas Sergeev
2017-04-01 17:49 ` H. Peter Anvin
2017-04-02 15:52 ` Andy Lutomirski
2017-04-04 9:59 ` Stas Sergeev
2017-04-04 2:05 ` Ricardo Neri
2017-04-04 8:03 ` Stas Sergeev
2017-03-10 23:58 ` Ricardo Neri
2017-03-09 0:46 ` Ricardo Neri
2017-03-09 22:01 ` Stas Sergeev
2017-03-10 23:47 ` Ricardo Neri
2017-03-10 23:58 ` Stas Sergeev
2017-03-11 0:13 ` Ricardo Neri
2017-03-08 16:07 ` Andy Lutomirski
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