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* [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
@ 2017-11-10  9:38 Vikas C Sajjan
  2017-11-15 10:05 ` Sajjan, Vikas C
  2017-11-15 17:20 ` Rafael J. Wysocki
  0 siblings, 2 replies; 7+ messages in thread
From: Vikas C Sajjan @ 2017-11-10  9:38 UTC (permalink / raw)
  To: linux-pm, linux-acpi, rjw
  Cc: linux-kernel, kkamagui, tglx, mingo, Vikas C Sajjan, Sunil V L,
	Abdul Lateef Attar

The platforms which support only IOAPIC mode and whose SCI INT is
greater than 16, passes SCI INT via FADT and not via MADT int src override
structure. In such cases current logic fails to handle it and throws error
"Invalid bus_irq %u for legacy override". This patch handles the above
 mentioned case. While at it, also modify function mp_override_legacy_irq()
to use the newly introduced function mp_register_ioapic_irq().

Signed-off-by: Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
Signed-off-by: Sunil V L <sunil.vl@hpe.com>
Signed-off-by: Abdul Lateef Attar <abdul-lateef.attar@hpe.com>
---
 arch/x86/kernel/acpi/boot.c | 77 +++++++++++++++++++++++++++------------------
 1 file changed, 47 insertions(+), 30 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 079535e..8ab97a5 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -342,13 +342,12 @@ static int acpi_register_lapic(int id, u32 acpiid, u8 enabled)
 #ifdef CONFIG_X86_IO_APIC
 #define MP_ISA_BUS		0
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi);
+
 static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 					  u32 gsi)
 {
-	int ioapic;
-	int pin;
-	struct mpc_intsrc mp_irq;
-
 	/*
 	 * Check bus_irq boundary.
 	 */
@@ -357,32 +356,8 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 		return;
 	}
 
-	/*
-	 * Convert 'gsi' to 'ioapic.pin'.
-	 */
-	ioapic = mp_find_ioapic(gsi);
-	if (ioapic < 0)
+	if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
 		return;
-	pin = mp_find_ioapic_pin(ioapic, gsi);
-
-	/*
-	 * TBD: This check is for faulty timer entries, where the override
-	 *      erroneously sets the trigger to level, resulting in a HUGE
-	 *      increase of timer interrupts!
-	 */
-	if ((bus_irq == 0) && (trigger == 3))
-		trigger = 1;
-
-	mp_irq.type = MP_INTSRC;
-	mp_irq.irqtype = mp_INT;
-	mp_irq.irqflag = (trigger << 2) | polarity;
-	mp_irq.srcbus = MP_ISA_BUS;
-	mp_irq.srcbusirq = bus_irq;	/* IRQ */
-	mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
-	mp_irq.dstirq = pin;	/* INTIN# */
-
-	mp_save_irq(&mp_irq);
-
 	/*
 	 * Reset default identity mapping if gsi is also an legacy IRQ,
 	 * otherwise there will be more than one entry with the same GSI
@@ -429,6 +404,44 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
 	return 0;
 }
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi)
+{
+	int ioapic;
+	int pin;
+	struct mpc_intsrc mp_irq;
+
+	/*
+	 * Convert 'gsi' to 'ioapic.pin'.
+	 */
+	ioapic = mp_find_ioapic(gsi);
+	if (ioapic < 0) {
+		pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
+		return ioapic;
+	}
+	pin = mp_find_ioapic_pin(ioapic, gsi);
+
+	/*
+	 * TBD: This check is for faulty timer entries, where the override
+	 *      erroneously sets the trigger to level, resulting in a HUGE
+	 *      increase of timer interrupts!
+	 */
+	if ((bus_irq == 0) && (trigger == 3))
+		trigger = 1;
+
+	mp_irq.type = MP_INTSRC;
+	mp_irq.irqtype = mp_INT;
+	mp_irq.irqflag = (trigger << 2) | polarity;
+	mp_irq.srcbus = MP_ISA_BUS;
+	mp_irq.srcbusirq = bus_irq;	/* IRQ */
+	mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
+	mp_irq.dstirq = pin;	/* INTIN# */
+
+	mp_save_irq(&mp_irq);
+
+	return 0;
+}
+
 static int __init
 acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
 {
@@ -473,7 +486,11 @@ static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger,
 	if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
 		polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
 
-	mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	if (bus_irq < NR_IRQS_LEGACY)
+		mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	else
+		mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
+
 	acpi_penalize_sci_irq(bus_irq, trigger, polarity);
 
 	/*
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* RE: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
  2017-11-10  9:38 [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode Vikas C Sajjan
@ 2017-11-15 10:05 ` Sajjan, Vikas C
  2017-11-15 17:18   ` Rafael J. Wysocki
  2017-11-15 17:20 ` Rafael J. Wysocki
  1 sibling, 1 reply; 7+ messages in thread
From: Sajjan, Vikas C @ 2017-11-15 10:05 UTC (permalink / raw)
  To: rjw, rafael.j.wysocki
  Cc: linux-pm, linux-acpi, linux-kernel, kkamagui, tglx, mingo,
	Lakshminarasimha, Sunil Vishwanathpur, Attar, Abdul Lateef

Hi Rafael,

Any thoughts on this.

Regards
Vikas Sajjan

-----Original Message-----
From: Sajjan, Vikas C 
Sent: Friday, November 10, 2017 3:08 PM
To: linux-pm@vger.kernel.org; linux-acpi@vger.kernel.org; rjw@rjwysocki.net
Cc: linux-kernel@vger.kernel.org; kkamagui@gmail.com; tglx@linutronix.de; mingo@kernel.org; Sajjan, Vikas C <vikas.cha.sajjan@hpe.com>; Lakshminarasimha, Sunil Vishwanathpur <sunil.vl@hpe.com>; Attar, Abdul Lateef <abdul-lateef.attar@hpe.com>
Subject: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

The platforms which support only IOAPIC mode and whose SCI INT is greater than 16, passes SCI INT via FADT and not via MADT int src override structure. In such cases current logic fails to handle it and throws error "Invalid bus_irq %u for legacy override". This patch handles the above  mentioned case. While at it, also modify function mp_override_legacy_irq() to use the newly introduced function mp_register_ioapic_irq().

Signed-off-by: Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
Signed-off-by: Sunil V L <sunil.vl@hpe.com>
Signed-off-by: Abdul Lateef Attar <abdul-lateef.attar@hpe.com>
---
 arch/x86/kernel/acpi/boot.c | 77 +++++++++++++++++++++++++++------------------
 1 file changed, 47 insertions(+), 30 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 079535e..8ab97a5 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -342,13 +342,12 @@ static int acpi_register_lapic(int id, u32 acpiid, u8 enabled)  #ifdef CONFIG_X86_IO_APIC
 #define MP_ISA_BUS		0
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi);
+
 static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 					  u32 gsi)
 {
-	int ioapic;
-	int pin;
-	struct mpc_intsrc mp_irq;
-
 	/*
 	 * Check bus_irq boundary.
 	 */
@@ -357,32 +356,8 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 		return;
 	}
 
-	/*
-	 * Convert 'gsi' to 'ioapic.pin'.
-	 */
-	ioapic = mp_find_ioapic(gsi);
-	if (ioapic < 0)
+	if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
 		return;
-	pin = mp_find_ioapic_pin(ioapic, gsi);
-
-	/*
-	 * TBD: This check is for faulty timer entries, where the override
-	 *      erroneously sets the trigger to level, resulting in a HUGE
-	 *      increase of timer interrupts!
-	 */
-	if ((bus_irq == 0) && (trigger == 3))
-		trigger = 1;
-
-	mp_irq.type = MP_INTSRC;
-	mp_irq.irqtype = mp_INT;
-	mp_irq.irqflag = (trigger << 2) | polarity;
-	mp_irq.srcbus = MP_ISA_BUS;
-	mp_irq.srcbusirq = bus_irq;	/* IRQ */
-	mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
-	mp_irq.dstirq = pin;	/* INTIN# */
-
-	mp_save_irq(&mp_irq);
-
 	/*
 	 * Reset default identity mapping if gsi is also an legacy IRQ,
 	 * otherwise there will be more than one entry with the same GSI @@ -429,6 +404,44 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
 	return 0;
 }
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi)
+{
+	int ioapic;
+	int pin;
+	struct mpc_intsrc mp_irq;
+
+	/*
+	 * Convert 'gsi' to 'ioapic.pin'.
+	 */
+	ioapic = mp_find_ioapic(gsi);
+	if (ioapic < 0) {
+		pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
+		return ioapic;
+	}
+	pin = mp_find_ioapic_pin(ioapic, gsi);
+
+	/*
+	 * TBD: This check is for faulty timer entries, where the override
+	 *      erroneously sets the trigger to level, resulting in a HUGE
+	 *      increase of timer interrupts!
+	 */
+	if ((bus_irq == 0) && (trigger == 3))
+		trigger = 1;
+
+	mp_irq.type = MP_INTSRC;
+	mp_irq.irqtype = mp_INT;
+	mp_irq.irqflag = (trigger << 2) | polarity;
+	mp_irq.srcbus = MP_ISA_BUS;
+	mp_irq.srcbusirq = bus_irq;	/* IRQ */
+	mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
+	mp_irq.dstirq = pin;	/* INTIN# */
+
+	mp_save_irq(&mp_irq);
+
+	return 0;
+}
+
 static int __init
 acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)  { @@ -473,7 +486,11 @@ static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger,
 	if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
 		polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
 
-	mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	if (bus_irq < NR_IRQS_LEGACY)
+		mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	else
+		mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
+
 	acpi_penalize_sci_irq(bus_irq, trigger, polarity);
 
 	/*
--
1.9.1

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
  2017-11-15 10:05 ` Sajjan, Vikas C
@ 2017-11-15 17:18   ` Rafael J. Wysocki
  0 siblings, 0 replies; 7+ messages in thread
From: Rafael J. Wysocki @ 2017-11-15 17:18 UTC (permalink / raw)
  To: Sajjan, Vikas C
  Cc: rjw, rafael.j.wysocki, linux-pm, linux-acpi, linux-kernel,
	kkamagui, tglx, mingo, Lakshminarasimha, Sunil Vishwanathpur,
	Attar, Abdul Lateef

On Wed, Nov 15, 2017 at 11:05 AM, Sajjan, Vikas C
<vikas.cha.sajjan@hpe.com> wrote:
> Hi Rafael,
>
> Any thoughts on this.

I don't have concerns about it, but you really need to talk to Thomas.

Thanks,
Rafael

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
  2017-11-10  9:38 [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode Vikas C Sajjan
  2017-11-15 10:05 ` Sajjan, Vikas C
@ 2017-11-15 17:20 ` Rafael J. Wysocki
  2017-11-15 17:30   ` Sajjan, Vikas C
  1 sibling, 1 reply; 7+ messages in thread
From: Rafael J. Wysocki @ 2017-11-15 17:20 UTC (permalink / raw)
  To: Vikas C Sajjan
  Cc: Linux PM, ACPI Devel Maling List, Rafael J. Wysocki,
	Linux Kernel Mailing List, Seunghun Han, Thomas Gleixner,
	Ingo Molnar, Sunil V L, Abdul Lateef Attar

On Fri, Nov 10, 2017 at 10:38 AM, Vikas C Sajjan
<vikas.cha.sajjan@hpe.com> wrote:
> The platforms which support only IOAPIC mode and whose SCI INT is
> greater than 16, passes SCI INT via FADT and not via MADT int src override
> structure. In such cases current logic fails to handle it and throws error
> "Invalid bus_irq %u for legacy override". This patch handles the above
>  mentioned case. While at it, also modify function mp_override_legacy_irq()
> to use the newly introduced function mp_register_ioapic_irq().

Actually, is it necessary to make this extra change here?

How complicated would it be to separate it out?

Thanks,
Rafael

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
  2017-11-15 17:20 ` Rafael J. Wysocki
@ 2017-11-15 17:30   ` Sajjan, Vikas C
  2017-11-15 17:58     ` Rafael J. Wysocki
  0 siblings, 1 reply; 7+ messages in thread
From: Sajjan, Vikas C @ 2017-11-15 17:30 UTC (permalink / raw)
  To: Rafael J. Wysocki
  Cc: Linux PM, ACPI Devel Maling List, Rafael J. Wysocki,
	Linux Kernel Mailing List, Seunghun Han, Thomas Gleixner,
	Ingo Molnar, Lakshminarasimha, Sunil Vishwanathpur, Attar,
	Abdul Lateef

Hi Rafael,

-----Original Message-----
From: rjwysocki@gmail.com [mailto:rjwysocki@gmail.com] On Behalf Of Rafael J. Wysocki
Sent: Wednesday, November 15, 2017 10:51 PM
To: Sajjan, Vikas C <vikas.cha.sajjan@hpe.com>
Cc: Linux PM <linux-pm@vger.kernel.org>; ACPI Devel Maling List <linux-acpi@vger.kernel.org>; Rafael J. Wysocki <rjw@rjwysocki.net>; Linux Kernel Mailing List <linux-kernel@vger.kernel.org>; Seunghun Han <kkamagui@gmail.com>; Thomas Gleixner <tglx@linutronix.de>; Ingo Molnar <mingo@kernel.org>; Lakshminarasimha, Sunil Vishwanathpur <sunil.vl@hpe.com>; Attar, Abdul Lateef <abdul-lateef.attar@hpe.com>
Subject: Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

On Fri, Nov 10, 2017 at 10:38 AM, Vikas C Sajjan <vikas.cha.sajjan@hpe.com> wrote:
> The platforms which support only IOAPIC mode and whose SCI INT is 
> greater than 16, passes SCI INT via FADT and not via MADT int src 
> override structure. In such cases current logic fails to handle it and 
> throws error "Invalid bus_irq %u for legacy override". This patch 
> handles the above  mentioned case. While at it, also modify function 
> mp_override_legacy_irq() to use the newly introduced function mp_register_ioapic_irq().

Actually, is it necessary to make this extra change here?

How complicated would it be to separate it out?

I can move these extra changes into a separate patch and keep only the fix in this patch.

Thanks,
Rafael

Thanks,
Vikas Sajjan

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
  2017-11-15 17:30   ` Sajjan, Vikas C
@ 2017-11-15 17:58     ` Rafael J. Wysocki
  2017-11-15 18:30       ` Thomas Gleixner
  0 siblings, 1 reply; 7+ messages in thread
From: Rafael J. Wysocki @ 2017-11-15 17:58 UTC (permalink / raw)
  To: Sajjan, Vikas C
  Cc: Rafael J. Wysocki, Linux PM, ACPI Devel Maling List,
	Rafael J. Wysocki, Linux Kernel Mailing List, Seunghun Han,
	Thomas Gleixner, Ingo Molnar, Lakshminarasimha,
	Sunil Vishwanathpur, Attar, Abdul Lateef

On Wed, Nov 15, 2017 at 6:30 PM, Sajjan, Vikas C
<vikas.cha.sajjan@hpe.com> wrote:
> Hi Rafael,
>
> -----Original Message-----
> From: rjwysocki@gmail.com [mailto:rjwysocki@gmail.com] On Behalf Of Rafael J. Wysocki
> Sent: Wednesday, November 15, 2017 10:51 PM
> To: Sajjan, Vikas C <vikas.cha.sajjan@hpe.com>
> Cc: Linux PM <linux-pm@vger.kernel.org>; ACPI Devel Maling List <linux-acpi@vger.kernel.org>; Rafael J. Wysocki <rjw@rjwysocki.net>; Linux Kernel Mailing List <linux-kernel@vger.kernel.org>; Seunghun Han <kkamagui@gmail.com>; Thomas Gleixner <tglx@linutronix.de>; Ingo Molnar <mingo@kernel.org>; Lakshminarasimha, Sunil Vishwanathpur <sunil.vl@hpe.com>; Attar, Abdul Lateef <abdul-lateef.attar@hpe.com>
> Subject: Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
>
> On Fri, Nov 10, 2017 at 10:38 AM, Vikas C Sajjan <vikas.cha.sajjan@hpe.com> wrote:
>> The platforms which support only IOAPIC mode and whose SCI INT is
>> greater than 16, passes SCI INT via FADT and not via MADT int src
>> override structure. In such cases current logic fails to handle it and
>> throws error "Invalid bus_irq %u for legacy override". This patch
>> handles the above  mentioned case. While at it, also modify function
>> mp_override_legacy_irq() to use the newly introduced function mp_register_ioapic_irq().
>
> Actually, is it necessary to make this extra change here?
>
> How complicated would it be to separate it out?
>
> I can move these extra changes into a separate patch and keep only the fix in this patch.

That would be useful I think in case someone wants to backport your
fix, for example.

Thanks,
Rafael

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
  2017-11-15 17:58     ` Rafael J. Wysocki
@ 2017-11-15 18:30       ` Thomas Gleixner
  0 siblings, 0 replies; 7+ messages in thread
From: Thomas Gleixner @ 2017-11-15 18:30 UTC (permalink / raw)
  To: Rafael J. Wysocki
  Cc: Sajjan, Vikas C, Linux PM, ACPI Devel Maling List,
	Rafael J. Wysocki, Linux Kernel Mailing List, Seunghun Han,
	Ingo Molnar, Lakshminarasimha, Sunil Vishwanathpur, Attar,
	Abdul Lateef

On Wed, 15 Nov 2017, Rafael J. Wysocki wrote:
> On Wed, Nov 15, 2017 at 6:30 PM, Sajjan, Vikas C
> <vikas.cha.sajjan@hpe.com> wrote:
> > Hi Rafael,
> >
> > -----Original Message-----
> > From: rjwysocki@gmail.com [mailto:rjwysocki@gmail.com] On Behalf Of Rafael J. Wysocki
> > Sent: Wednesday, November 15, 2017 10:51 PM
> > To: Sajjan, Vikas C <vikas.cha.sajjan@hpe.com>
> > Cc: Linux PM <linux-pm@vger.kernel.org>; ACPI Devel Maling List <linux-acpi@vger.kernel.org>; Rafael J. Wysocki <rjw@rjwysocki.net>; Linux Kernel Mailing List <linux-kernel@vger.kernel.org>; Seunghun Han <kkamagui@gmail.com>; Thomas Gleixner <tglx@linutronix.de>; Ingo Molnar <mingo@kernel.org>; Lakshminarasimha, Sunil Vishwanathpur <sunil.vl@hpe.com>; Attar, Abdul Lateef <abdul-lateef.attar@hpe.com>
> > Subject: Re: [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode
> >
> > On Fri, Nov 10, 2017 at 10:38 AM, Vikas C Sajjan <vikas.cha.sajjan@hpe.com> wrote:
> >> The platforms which support only IOAPIC mode and whose SCI INT is
> >> greater than 16, passes SCI INT via FADT and not via MADT int src
> >> override structure. In such cases current logic fails to handle it and
> >> throws error "Invalid bus_irq %u for legacy override". This patch
> >> handles the above  mentioned case. While at it, also modify function
> >> mp_override_legacy_irq() to use the newly introduced function mp_register_ioapic_irq().
> >
> > Actually, is it necessary to make this extra change here?
> >
> > How complicated would it be to separate it out?
> >
> > I can move these extra changes into a separate patch and keep only the fix in this patch.
> 
> That would be useful I think in case someone wants to backport your
> fix, for example.

That would also simplify review a lot. I'll wait for that before I twist my
brain around distangling the changes.

Thanks,

	tglx

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2017-11-15 18:30 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-11-10  9:38 [PATCH] x86/acpi: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode Vikas C Sajjan
2017-11-15 10:05 ` Sajjan, Vikas C
2017-11-15 17:18   ` Rafael J. Wysocki
2017-11-15 17:20 ` Rafael J. Wysocki
2017-11-15 17:30   ` Sajjan, Vikas C
2017-11-15 17:58     ` Rafael J. Wysocki
2017-11-15 18:30       ` Thomas Gleixner

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