* [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical
@ 2019-03-19 9:31 Leo Yan
2019-03-19 19:42 ` Stephen Boyd
0 siblings, 1 reply; 3+ messages in thread
From: Leo Yan @ 2019-03-19 9:31 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, linux-clk, linux-kernel
Cc: Leo Yan, stable, Zhong Kaihua, John Stultz, Zhangfei Gao
clk_gate_ufs_subsys is a system bus clock, turning off it will
introduce lockup issue during system suspend flow. Let's mark
clk_gate_ufs_subsys as critical clock, thus keeps it on during
system suspend and resume.
Fixes: d374e6fd5088 ("clk: hisilicon: Add clock driver for hi3660 SoC")
Cc: stable@vger.kernel.org
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Suggested-by: Dong Zhang <zhangdong46@hisilicon.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
drivers/clk/hisilicon/clk-hi3660.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c
index f40419959656..32ba80181cc6 100644
--- a/drivers/clk/hisilicon/clk-hi3660.c
+++ b/drivers/clk/hisilicon/clk-hi3660.c
@@ -164,7 +164,7 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = {
{ HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2",
"clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, },
{ HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",
- CLK_SET_RATE_PARENT, 0x50, 21, 0, },
+ CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x50, 21, 0, },
{ HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
CLK_SET_RATE_PARENT, 0x50, 28, 0, },
{ HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical
2019-03-19 9:31 [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical Leo Yan
@ 2019-03-19 19:42 ` Stephen Boyd
2019-03-20 0:59 ` Leo Yan
0 siblings, 1 reply; 3+ messages in thread
From: Stephen Boyd @ 2019-03-19 19:42 UTC (permalink / raw)
To: Leo Yan, Michael Turquette, linux-clk, linux-kernel
Cc: Leo Yan, stable, Zhong Kaihua, John Stultz, Zhangfei Gao
Quoting Leo Yan (2019-03-19 02:31:48)
> diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c
> index f40419959656..32ba80181cc6 100644
> --- a/drivers/clk/hisilicon/clk-hi3660.c
> +++ b/drivers/clk/hisilicon/clk-hi3660.c
> @@ -164,7 +164,7 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = {
> { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2",
> "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, },
> { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",
> - CLK_SET_RATE_PARENT, 0x50, 21, 0, },
> + CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x50, 21, 0, },
Nitpick: Please add space around | and also comment in the code why this
is a critical clk.
> { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
> CLK_SET_RATE_PARENT, 0x50, 28, 0, },
> { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical
2019-03-19 19:42 ` Stephen Boyd
@ 2019-03-20 0:59 ` Leo Yan
0 siblings, 0 replies; 3+ messages in thread
From: Leo Yan @ 2019-03-20 0:59 UTC (permalink / raw)
To: Stephen Boyd
Cc: Michael Turquette, linux-clk, linux-kernel, stable, Zhong Kaihua,
John Stultz, Zhangfei Gao
On Tue, Mar 19, 2019 at 12:42:43PM -0700, Stephen Boyd wrote:
> Quoting Leo Yan (2019-03-19 02:31:48)
> > diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c
> > index f40419959656..32ba80181cc6 100644
> > --- a/drivers/clk/hisilicon/clk-hi3660.c
> > +++ b/drivers/clk/hisilicon/clk-hi3660.c
> > @@ -164,7 +164,7 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = {
> > { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2",
> > "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, },
> > { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",
> > - CLK_SET_RATE_PARENT, 0x50, 21, 0, },
> > + CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x50, 21, 0, },
>
> Nitpick: Please add space around | and also comment in the code why this
> is a critical clk.
Will fix it and spin a new patch.
Thanks for suggestions, Stephen.
> > { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
> > CLK_SET_RATE_PARENT, 0x50, 28, 0, },
> > { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-03-20 1:00 UTC | newest]
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2019-03-19 9:31 [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical Leo Yan
2019-03-19 19:42 ` Stephen Boyd
2019-03-20 0:59 ` Leo Yan
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