From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
"David Airlie" <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v5, 09/32] drm/mediatek: add mutex sof into ddp private data
Date: Wed, 9 Oct 2019 17:33:09 +0800 [thread overview]
Message-ID: <1570613589.7713.12.camel@mtksdaap41> (raw)
In-Reply-To: <1567090254-15566-10-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
>
> mutex sof will be ddp private data
>
Applied to mediatek-drm-next-5.5 [1], thanks.
[1]
https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-next-5.5
Regards,
CK
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 43 +++++++++++++++++++++++++++-------
> 1 file changed, 35 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index ae22e21..9bdbd8d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -141,8 +141,19 @@ struct mtk_disp_mutex {
> bool claimed;
> };
>
> +enum mtk_ddp_mutex_sof_id {
> + DDP_MUTEX_SOF_SINGLE_MODE,
> + DDP_MUTEX_SOF_DSI0,
> + DDP_MUTEX_SOF_DSI1,
> + DDP_MUTEX_SOF_DPI0,
> + DDP_MUTEX_SOF_DPI1,
> + DDP_MUTEX_SOF_DSI2,
> + DDP_MUTEX_SOF_DSI3,
> +};
> +
> struct mtk_ddp_data {
> const unsigned int *mutex_mod;
> + const unsigned int *mutex_sof;
> const unsigned int mutex_mod_reg;
> };
>
> @@ -201,18 +212,31 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> + [DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1,
> + [DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2,
> + [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> +};
> +
> static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> .mutex_mod = mt2701_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> };
>
> static const struct mtk_ddp_data mt2712_ddp_driver_data = {
> .mutex_mod = mt2712_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> };
>
> static const struct mtk_ddp_data mt8173_ddp_driver_data = {
> .mutex_mod = mt8173_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> };
>
> @@ -454,28 +478,29 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
> mutex[mutex->id]);
> unsigned int reg;
> + unsigned int sof_id;
> unsigned int offset;
>
> WARN_ON(&ddp->mutex[mutex->id] != mutex);
>
> switch (id) {
> case DDP_COMPONENT_DSI0:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI1:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI2:
> - reg = MUTEX_SOF_DSI2;
> + sof_id = DDP_MUTEX_SOF_DSI2;
> break;
> case DDP_COMPONENT_DSI3:
> - reg = MUTEX_SOF_DSI3;
> + sof_id = DDP_MUTEX_SOF_DSI3;
> break;
> case DDP_COMPONENT_DPI0:
> - reg = MUTEX_SOF_DPI0;
> + sof_id = DDP_MUTEX_SOF_DPI0;
> break;
> case DDP_COMPONENT_DPI1:
> - reg = MUTEX_SOF_DPI1;
> + sof_id = DDP_MUTEX_SOF_DPI1;
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
> @@ -493,7 +518,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> return;
> }
>
> - writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + writel_relaxed(ddp->data->mutex_sof[sof_id],
> + ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> }
>
> void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -514,7 +540,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> case DDP_COMPONENT_DPI0:
> case DDP_COMPONENT_DPI1:
> writel_relaxed(MUTEX_SOF_SINGLE_MODE,
> - ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + ddp->regs +
> + DISP_REG_MUTEX_SOF(mutex->id));
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
next prev parent reply other threads:[~2019-10-09 9:33 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 14:50 [PATCH v5, 00/32] add drm support for MT8183 yongqiang.niu
2019-08-29 14:50 ` [PATCH v5, 01/32] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-08-30 5:15 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 02/32] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu
2019-09-04 1:44 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 03/32] dt-bindings: mediatek: add ccorr " yongqiang.niu
2019-09-04 1:44 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 04/32] dt-bindings: mediatek: add dither " yongqiang.niu
2019-09-04 1:45 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 05/32] dt-bindings: mediatek: add mutex " yongqiang.niu
2019-09-02 13:38 ` Rob Herring
2019-09-04 1:45 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 06/32] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-08-29 14:50 ` [PATCH v5, 07/32] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-10-09 9:31 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 08/32] drm/mediatek: add mutex mod register offset " yongqiang.niu
2019-10-09 9:32 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 09/32] drm/mediatek: add mutex sof " yongqiang.niu
2019-10-09 9:33 ` CK Hu [this message]
2019-08-29 14:50 ` [PATCH v5, 10/32] drm/mediatek: add mutex sof register offset " yongqiang.niu
2019-10-09 9:33 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 11/32] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-08-30 5:21 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 12/32] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-08-30 5:27 ` CK Hu
2019-08-30 5:40 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 13/32] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-08-30 5:41 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 14/32] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-10-09 9:10 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 15/32] drm/mediatek: add commponent OVL_2L0 yongqiang.niu
2019-10-09 9:17 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 16/32] drm/mediatek: add component OVL_2L1 yongqiang.niu
2019-10-09 9:18 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 17/32] drm/mediatek: add component DITHER yongqiang.niu
2019-10-09 9:11 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 18/32] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-10-09 9:19 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 19/32] drm/medaitek: add layer_nr " yongqiang.niu
2019-10-09 9:20 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 20/32] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-10-09 9:24 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 21/32] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-10-09 9:24 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 22/32] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu
2019-08-30 5:58 ` CK Hu
2019-09-02 8:11 ` CK Hu
2019-10-09 9:29 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 23/32] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu
2019-10-09 9:28 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 24/32] drm/mediatek: add clock property check before get it yongqiang.niu
2019-08-30 6:11 ` CK Hu
2019-10-09 9:36 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 25/32] drm/mediatek: add connection from OVL0 to OVL_2L0 yongqiang.niu
2019-08-30 6:20 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 26/32] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu
2019-08-30 6:23 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 27/32] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu
2019-08-30 6:25 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 28/32] drm/mediatek: add connection from OVL_2L0 to RDMA0 yongqiang.niu
2019-08-30 6:30 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 29/32] drm/mediatek: add connection from OVL_2L1 to RDMA1 yongqiang.niu
2019-08-30 6:33 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 30/32] drm/mediatek: add connection from DITHER0 to DSI0 yongqiang.niu
2019-08-30 6:34 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 31/32] drm/mediatek: add connection from RDMA0 " yongqiang.niu
2019-08-30 6:36 ` CK Hu
2019-08-29 14:50 ` [PATCH v5, 32/32] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-08-30 6:38 ` CK Hu
2019-09-05 7:17 ` CK Hu
2020-05-21 10:52 ` Matthias Brugger
2019-10-09 9:47 ` [PATCH v5, 00/32] add drm support for MT8183 CK Hu
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