From: Xu Yilun <yilun.xu@intel.com>
To: lee.jones@linaro.org, linux-kernel@vger.kernel.org
Cc: trix@redhat.com, yilun.xu@intel.com,
matthew.gerlach@linux.intel.com, russell.h.weight@intel.com,
lgoncalv@redhat.com, hao.wu@intel.com
Subject: [PATCH v2 1/4] mfd: intel-m10-bmc: Fix the register access range
Date: Tue, 26 Jan 2021 14:50:33 +0800 [thread overview]
Message-ID: <1611643836-7183-2-git-send-email-yilun.xu@intel.com> (raw)
In-Reply-To: <1611643836-7183-1-git-send-email-yilun.xu@intel.com>
This patch fixes the max register address of MAX 10 BMC. The range
0x20000000 ~ 0x200000fc are for control registers of the QSPI flash
controller, which are not accessible to host.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v2: no change.
---
include/linux/mfd/intel-m10-bmc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index c8ef2f1..06da62c 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -11,7 +11,7 @@
#define M10BMC_LEGACY_SYS_BASE 0x300400
#define M10BMC_SYS_BASE 0x300800
-#define M10BMC_MEM_END 0x200000fc
+#define M10BMC_MEM_END 0x1fffffff
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0
--
2.7.4
next prev parent reply other threads:[~2021-01-26 18:36 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-26 6:50 [PATCH v2 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
2021-01-26 6:50 ` Xu Yilun [this message]
2021-01-26 6:50 ` [PATCH v2 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition Xu Yilun
2021-01-26 14:58 ` Tom Rix
2021-01-26 6:50 ` [PATCH v2 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap Xu Yilun
2021-01-26 15:00 ` Tom Rix
2021-01-26 6:50 ` [PATCH v2 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver Xu Yilun
2021-01-26 15:06 ` Tom Rix
2021-01-27 1:33 ` Xu Yilun
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