From: Stephen Boyd <swboyd@chromium.org>
To: Sibi Sankar <sibis@codeaurora.org>,
bjorn.andersson@linaro.org, p.zabel@pengutronix.de,
robh+dt@kernel.org
Cc: agross@kernel.org, mani@kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Sibi Sankar <sibis@codeaurora.org>
Subject: Re: [PATCH 6/6] arm64: dts: qcom: sc7280: Add nodes to boot WPSS
Date: Sat, 13 Mar 2021 13:46:12 -0800 [thread overview]
Message-ID: <161567197220.1478170.12600358804299446135@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1615269111-25559-7-git-send-email-sibis@codeaurora.org>
Quoting Sibi Sankar (2021-03-08 21:51:51)
> Add miscellaneous nodes to boot the Wireless Processor Subsystem on
Maybe add (WPSS) after the name so we know they're related.
> SC7280 SoCs.
>
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>
> https://patchwork.kernel.org/project/linux-arm-msm/list/?series=438217
> Depends on ipcc dt node enablement from ^^
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 143 +++++++++++++++++++++++++++++++++++
> 1 file changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 18637c369c1d..4f03c468df51 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -244,12 +251,131 @@
> reg = <0 0x80000000 0 0>;
> };
>
> + tcsr_mutex: hwlock {
> + compatible = "qcom,tcsr-mutex";
> + syscon = <&tcsr_mutex_regs 0 0x1000>;
> + #hwlock-cells = <1>;
> + };
Is this node in the right place? I think the node above it is 'memory'?
In which case 'hwlock' comes before 'memory' alphabetically.
> +
> + smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_mem>;
> + hwlocks = <&tcsr_mutex 3>;
> + };
> +
> firmware {
> scm {
> compatible = "qcom,scm-sc7280", "qcom,scm";
> };
> };
>
> + smp2p-adsp {
> + compatible = "qcom,smp2p";
> + qcom,smem = <443>, <429>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <2>;
> +
> + adsp_smp2p_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + adsp_smp2p_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-cdsp {
> + compatible = "qcom,smp2p";
> + qcom,smem = <94>, <432>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <5>;
> +
> + cdsp_smp2p_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + cdsp_smp2p_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-mpss {
> + compatible = "qcom,smp2p";
> + qcom,smem = <435>, <428>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_MPSS
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <1>;
> +
> + modem_smp2p_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + modem_smp2p_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
Do these names need to have 'master' and 'slave' in them? We're trying
to avoid these terms. See Documentation/process/coding-style.rst Section
4 naming.
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + ipa_smp2p_out: ipa-ap-to-modem {
> + qcom,entry-name = "ipa";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + ipa_smp2p_in: ipa-modem-to-ap {
> + qcom,entry-name = "ipa";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
next prev parent reply other threads:[~2021-03-13 21:53 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-09 5:51 [PATCH 0/6] Enable miscellaneous hardware blocks to boot WPSS Sibi Sankar
2021-03-09 5:51 ` [PATCH 1/6] soc: qcom: smem: Update max processor count Sibi Sankar
2021-03-13 21:36 ` Stephen Boyd
2021-03-09 5:51 ` [PATCH 2/6] dt-bindings: mailbox: Add WPSS client index to IPCC Sibi Sankar
2021-03-13 21:37 ` Stephen Boyd
2021-03-16 22:07 ` Rob Herring
2021-03-09 5:51 ` [PATCH 3/6] dt-bindings: reset: aoss: Add AOSS reset controller binding Sibi Sankar
2021-03-13 21:37 ` Stephen Boyd
2021-03-16 22:07 ` Rob Herring
2021-03-09 5:51 ` [PATCH 4/6] dt-bindings: reset: pdc: Add PDC Global bindings Sibi Sankar
2021-03-13 21:37 ` Stephen Boyd
2021-04-19 10:27 ` Sibi Sankar
2021-03-16 22:08 ` Rob Herring
2021-03-09 5:51 ` [PATCH 5/6] reset: qcom: Add PDC Global reset signals for WPSS Sibi Sankar
2021-03-13 21:40 ` Stephen Boyd
2021-03-09 5:51 ` [PATCH 6/6] arm64: dts: qcom: sc7280: Add nodes to boot WPSS Sibi Sankar
2021-03-13 21:46 ` Stephen Boyd [this message]
2021-03-14 4:16 ` Bjorn Andersson
2021-03-23 22:06 ` Stephen Boyd
2021-03-24 6:49 ` Sibi Sankar
2021-04-19 10:10 ` Sibi Sankar
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