[GIT PULL] AMD MCE thresholding fixes for 3.5

[GIT PULL] AMD MCE thresholding fixes for 3.5

[Borislav Petkov]

Hi Ingo,

those are three patches which should fix the case where the APIC LVT
thresholding interrupt is not supported. No hurry here, it can wait for
the 3.5 merge window,

Thanks.

--
The following changes since commit 69964ea4c7b68c9399f7977aa5b9aa6539a6a98a:

  Linux 3.4-rc5 (2012-04-29 15:19:10 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git tags/amd-thresholding-fixes-for-3.5

for you to fetch changes up to 575203b4747c371698dd686b1fa6d0a3a0c47ac6:

  x86, MCE, AMD: Disable error thresholding bank 4 on some models (2012-04-30 13:22:54 +0200)

----------------------------------------------------------------
A three-patch set which makes the APIC LVT interrupt optional because a
subset of F15h models don't support it.

----------------------------------------------------------------
Borislav Petkov (3):
      x86, MCE, AMD: Make APIC LVT thresholding interrupt optional
      x86, MCE, AMD: Hide interrupt_enable sysfs node
      x86, MCE, AMD: Disable error thresholding bank 4 on some models

 arch/x86/kernel/cpu/mcheck/mce.c     |   37 +++++++++++++++++++
 arch/x86/kernel/cpu/mcheck/mce_amd.c |   65 ++++++++++++++++++++++++++--------
 2 files changed, 88 insertions(+), 14 deletions(-)

-- 
Regards/Gruss,
Boris.

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Re: [GIT PULL] AMD MCE thresholding fixes for 3.5

[Ingo Molnar]

* Borislav Petkov <bp@amd64.org> wrote:

> Hi Ingo,
> 
> those are three patches which should fix the case where the APIC LVT
> thresholding interrupt is not supported. No hurry here, it can wait for
> the 3.5 merge window,
> 
> Thanks.
> 
> --
> The following changes since commit 69964ea4c7b68c9399f7977aa5b9aa6539a6a98a:
> 
>   Linux 3.4-rc5 (2012-04-29 15:19:10 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git tags/amd-thresholding-fixes-for-3.5
> 
> for you to fetch changes up to 575203b4747c371698dd686b1fa6d0a3a0c47ac6:
> 
>   x86, MCE, AMD: Disable error thresholding bank 4 on some models (2012-04-30 13:22:54 +0200)
> 
> ----------------------------------------------------------------
> A three-patch set which makes the APIC LVT interrupt optional because a
> subset of F15h models don't support it.
> 
> ----------------------------------------------------------------
> Borislav Petkov (3):
>       x86, MCE, AMD: Make APIC LVT thresholding interrupt optional
>       x86, MCE, AMD: Hide interrupt_enable sysfs node
>       x86, MCE, AMD: Disable error thresholding bank 4 on some models
> 
>  arch/x86/kernel/cpu/mcheck/mce.c     |   37 +++++++++++++++++++
>  arch/x86/kernel/cpu/mcheck/mce_amd.c |   65 ++++++++++++++++++++++++++--------
>  2 files changed, 88 insertions(+), 14 deletions(-)

Pulled, thanks Boris!

	Ingo