From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, "Wu,
Feng" <feng.wu@intel.com>
Subject: Re: [PATCH 6/6] kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt injection
Date: Thu, 9 Feb 2017 16:11:46 +0100 [thread overview]
Message-ID: <20170209151145.GK31091@potion> (raw)
In-Reply-To: <d74d36b4-3376-2577-f81e-cb819e676fb4@redhat.com>
2017-02-08 17:23+0100, Paolo Bonzini:
> On 07/02/2017 20:58, Radim Krčmář wrote:
>>> - local_irq_disable();
>>> + if (kvm_lapic_enabled(vcpu)) {
>>> + /*
>>> + * This handles the case where a posted interrupt was
>>> + * notified with kvm_vcpu_kick.
>>> + */
>>> + if (kvm_x86_ops->sync_pir_to_irr)
>>> + kvm_x86_ops->sync_pir_to_irr(vcpu);
>> Hm, this is not working well when nesting while L1 has assigned devices:
>> if the posted interrupt arrives just before local_irq_disable(), then
>> we'll just enter L2 instead of doing a nested VM exit (in case we have
>> interrupt exiting).
>>
>> And after reading the code a bit, I think we allow posted interrupts in
>> L2 while L1 has assigned devices that use posted interrupts, and that it
>> doesn't work.
>
> So you mean the interrupt is delivered to L2? The fix would be to wrap
> L2 entry and exit with some subset of pi_pre_block/pi_post_block.
I hope not, as their PI strucutres are separate, so we'd be just
delaying the interrupt injection to L1. The CPU running L2 guest will
notice a posted notification, but its PIR.ON will/might not be set.
L1's PIR.ON will be set, but no-one is going to care until the next VM
exit.
I'll add some unit tests to check that I understood the bug correctly.
Changing the notification vector for L2 would be an ok solution.
We'd reserve a new vector in L0 and check L1's interrupts. If it were
targetting a VCPU that is currently in L2 with a notification vector
configured for L2, we'd translate that vector into the notification
vector we set for L2 -- L1 could then post interrupts to L2 without a VM
exit. And "posted" interrupts for L1 while in L2 would trigger a VM
exit, because the notification vector would be different.
next prev parent reply other threads:[~2017-02-09 15:12 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-19 16:17 [PATCH v2 0/6] KVM: x86: cleanup and speedup for APICv Paolo Bonzini
2016-12-19 16:17 ` [PATCH 1/6] KVM: vmx: clear pending interrupts on KVM_SET_LAPIC Paolo Bonzini
2017-02-07 17:42 ` Radim Krčmář
2016-12-19 16:17 ` [PATCH 2/6] kvm: nVMX: move nested events check to kvm_vcpu_running Paolo Bonzini
2017-02-07 18:16 ` Radim Krčmář
2016-12-19 16:17 ` [PATCH 3/6] KVM: x86: preparatory changes for APICv cleanups Paolo Bonzini
2017-02-07 18:20 ` Radim Krčmář
2016-12-19 16:17 ` [PATCH 4/6] KVM: vmx: move sync_pir_to_irr from apic_find_highest_irr to callers Paolo Bonzini
2016-12-19 16:17 ` [PATCH 5/6] KVM: x86: do not scan IRR twice on APICv vmentry Paolo Bonzini
2017-02-07 20:19 ` Radim Krčmář
2017-02-07 21:49 ` Radim Krčmář
2017-02-08 14:10 ` Paolo Bonzini
2017-02-08 14:24 ` Radim Krčmář
2016-12-19 16:17 ` [PATCH 6/6] kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt injection Paolo Bonzini
2017-02-07 19:58 ` Radim Krčmář
2017-02-08 16:23 ` Paolo Bonzini
2017-02-09 15:11 ` Radim Krčmář [this message]
2017-03-09 1:23 ` Wanpeng Li
2017-03-09 9:40 ` Wanpeng Li
2017-03-09 10:03 ` Paolo Bonzini
2017-02-07 17:23 ` [PATCH v2 0/6] KVM: x86: cleanup and speedup for APICv Paolo Bonzini
2017-02-07 21:52 ` Radim Krčmář
2017-02-08 10:04 ` Paolo Bonzini
2017-02-08 13:33 ` Radim Krčmář
2017-02-08 15:01 ` Paolo Bonzini
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