* [PATCH] drm/rockchip: support hwc layer
@ 2018-11-17 16:58 Randy Li
2018-11-19 20:15 ` kbuild test robot
0 siblings, 1 reply; 2+ messages in thread
From: Randy Li @ 2018-11-17 16:58 UTC (permalink / raw)
To: dri-devel; +Cc: linux-kernel, hjc, heiko, airlied, linux-rockchip, ayaka
From: ayaka <ayaka@soulik.info>
The Windows 2/3 or a RGB UI layer is a high performance flexibly
plane. It is too waste to use it as a cursor plane.
I have verified this patch with weston git version, I am not
sure whether X would meet with this patch. As the previous
author is gone, I can't confirm this problem with him.
Signed-off-by: Randy Li <ayaka@soulik.info>
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 30 +++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 42 ++++++++++++++++++++++++++---
2 files changed, 68 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 9301006329e8..1103049da91f 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -223,6 +223,16 @@ static bool has_rb_swapped(uint32_t format)
}
}
+static bool is_yuv_10bit (uint32_t format)
+{
+ switch (format) {
+ case DRM_FORMAT_NV12_10LE40:
+ return true;
+ default:
+ return false;
+ };
+}
+
static enum vop_data_format vop_convert_format(uint32_t format)
{
switch (format) {
@@ -755,6 +765,26 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
dsp_info = (drm_rect_height(dest) - 1) << 16;
dsp_info |= (drm_rect_width(dest) - 1) & 0xffff;
+ /* HWC layer only supports various of square icon */
+ if (plane->type == DRM_PLANE_TYPE_CURSOR) {
+ switch (actual_w) {
+ case 32:
+ dsp_info = 0;
+ break;
+ case 64:
+ dsp_info = 0x1;
+ break;
+ case 94:
+ dsp_info = 0x10;
+ break;
+ case 128:
+ dsp_info = 0x11;
+ break;
+ /* Unsupported pixel resolution */
+ default:
+ return;
+ }
+ }
dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start;
dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 6370f7d33273..0f7809511388 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -64,6 +64,15 @@ static const uint32_t formats_win_lite[] = {
DRM_FORMAT_BGR565,
};
+static const uint32_t formats_win_hwc[] = {
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_BGR565,
+};
+
static const struct vop_scl_regs rk3036_win_scl = {
.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
@@ -458,6 +467,19 @@ static const struct vop_win_phy rk3288_win23_data = {
.dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0),
};
+static const struct vop_win_phy rk3288_winhwc_data = {
+ .data_formats = formats_win_hwc,
+ .nformats = ARRAY_SIZE(formats_win_hwc),
+ .enable = VOP_REG(RK3288_HWC_CTRL0, 0x1, 0),
+ .format = VOP_REG(RK3288_HWC_CTRL0, 0x7, 1),
+ .rb_swap = VOP_REG(RK3288_HWC_CTRL0, 0x1, 12),
+ .dsp_info = VOP_REG(RK3288_HWC_CTRL0, 0x3, 5),
+ .dsp_st = VOP_REG(RK3288_HWC_DSP_ST, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3288_HWC_MST, 0xffffffff, 0),
+ .src_alpha_ctl = VOP_REG(RK3288_HWC_SRC_ALPHA_CTRL, 0xffff, 0),
+ .dst_alpha_ctl = VOP_REG(RK3288_HWC_DST_ALPHA_CTRL, 0xffffffff, 0),
+};
+
static const struct vop_modeset rk3288_modeset = {
.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
@@ -502,7 +524,10 @@ static const struct vop_win_data rk3288_vop_win_data[] = {
{ .base = 0x00, .phy = &rk3288_win23_data,
.type = DRM_PLANE_TYPE_OVERLAY },
{ .base = 0x50, .phy = &rk3288_win23_data,
- .type = DRM_PLANE_TYPE_CURSOR },
+ .type = DRM_PLANE_TYPE_OVERLAY },
+ { .base = 0x00, .phy = &rk3288_winhwc_data,
+ .type = DRM_PLANE_TYPE_CURSOR,
+ },
};
static const int rk3288_vop_intrs[] = {
@@ -575,7 +600,10 @@ static const struct vop_win_data rk3368_vop_win_data[] = {
{ .base = 0x00, .phy = &rk3368_win23_data,
.type = DRM_PLANE_TYPE_OVERLAY },
{ .base = 0x50, .phy = &rk3368_win23_data,
- .type = DRM_PLANE_TYPE_CURSOR },
+ .type = DRM_PLANE_TYPE_OVERLAY },
+ { .base = 0x00, .phy = &rk3288_winhwc_data,
+ .type = DRM_PLANE_TYPE_CURSOR,
+ },
};
static const struct vop_output rk3368_output = {
@@ -655,7 +683,10 @@ static const struct vop_win_data rk3399_vop_lit_win_data[] = {
{ .base = 0x00, .phy = &rk3288_win01_data,
.type = DRM_PLANE_TYPE_PRIMARY },
{ .base = 0x00, .phy = &rk3368_win23_data,
- .type = DRM_PLANE_TYPE_CURSOR},
+ .type = DRM_PLANE_TYPE_OVERLAY},
+ { .base = 0x00, .phy = &rk3288_winhwc_data,
+ .type = DRM_PLANE_TYPE_CURSOR,
+ },
};
static const struct vop_data rk3399_vop_lit = {
@@ -737,7 +768,10 @@ static const struct vop_win_data rk3328_vop_win_data[] = {
{ .base = 0x1d0, .phy = &rk3288_win01_data,
.type = DRM_PLANE_TYPE_OVERLAY },
{ .base = 0x2d0, .phy = &rk3288_win01_data,
- .type = DRM_PLANE_TYPE_CURSOR },
+ .type = DRM_PLANE_TYPE_OVERLAY },
+ { .base = 0x00, .phy = &rk3288_winhwc_data,
+ .type = DRM_PLANE_TYPE_CURSOR,
+ },
};
static const struct vop_data rk3328_vop = {
--
2.14.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/rockchip: support hwc layer
2018-11-17 16:58 [PATCH] drm/rockchip: support hwc layer Randy Li
@ 2018-11-19 20:15 ` kbuild test robot
0 siblings, 0 replies; 2+ messages in thread
From: kbuild test robot @ 2018-11-19 20:15 UTC (permalink / raw)
To: Randy Li
Cc: kbuild-all, dri-devel, linux-kernel, hjc, heiko, airlied,
linux-rockchip, ayaka
[-- Attachment #1: Type: text/plain, Size: 1975 bytes --]
Hi ayaka,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on v4.20-rc3 next-20181119]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Randy-Li/drm-rockchip-support-hwc-layer/20181119-173536
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm64
All errors (new ones prefixed by >>):
drivers/gpu//drm/rockchip/rockchip_drm_vop.c: In function 'is_yuv_10bit':
>> drivers/gpu//drm/rockchip/rockchip_drm_vop.c:229:7: error: 'DRM_FORMAT_NV12_10LE40' undeclared (first use in this function); did you mean 'DRM_FORMAT_NV12'?
case DRM_FORMAT_NV12_10LE40:
^~~~~~~~~~~~~~~~~~~~~~
DRM_FORMAT_NV12
drivers/gpu//drm/rockchip/rockchip_drm_vop.c:229:7: note: each undeclared identifier is reported only once for each function it appears in
At top level:
drivers/gpu//drm/rockchip/rockchip_drm_vop.c:226:13: warning: 'is_yuv_10bit' defined but not used [-Wunused-function]
static bool is_yuv_10bit (uint32_t format)
^~~~~~~~~~~~
vim +229 drivers/gpu//drm/rockchip/rockchip_drm_vop.c
225
226 static bool is_yuv_10bit (uint32_t format)
227 {
228 switch (format) {
> 229 case DRM_FORMAT_NV12_10LE40:
230 return true;
231 default:
232 return false;
233 };
234 }
235
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 40898 bytes --]
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2018-11-19 20:15 ` kbuild test robot
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