From: Lina Iyer <ilina@codeaurora.org>
To: swboyd@chromium.org, evgreen@chromium.org, marc.zyngier@arm.com,
linus.walleij@linaro.org
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
bjorn.andersson@linaro.org, mkshah@codeaurora.org,
linux-gpio@vger.kernel.org, rnayak@codeaurora.org
Subject: [PATCH RFC 07/14] genirq: Introduce irq_chip_get/set_parent_state calls
Date: Thu, 29 Aug 2019 12:11:56 -0600 [thread overview]
Message-ID: <20190829181203.2660-8-ilina@codeaurora.org> (raw)
In-Reply-To: <20190829181203.2660-1-ilina@codeaurora.org>
From: Maulik Shah <mkshah@codeaurora.org>
On certain QTI chipsets some GPIOs are direct-connect interrupts
to the GIC.
Even when GPIOs are not used for interrupt generation and interrupt
line is disabled, it does not prevent interrupt to get pending at
GIC_ISPEND. When drivers call enable_irq unwanted interrupt occures.
Introduce irq_chip_get/set_parent_state calls to clear pending irq
which can get called within irq_enable of child irq chip to clear
any pending irq before enabling.
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
---
include/linux/irq.h | 6 ++++++
kernel/irq/chip.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index fb301cf29148..7853eb9301f2 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -610,6 +610,12 @@ extern int irq_chip_pm_put(struct irq_data *data);
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
extern void handle_fasteoi_ack_irq(struct irq_desc *desc);
extern void handle_fasteoi_mask_irq(struct irq_desc *desc);
+extern int irq_chip_set_parent_state(struct irq_data *data,
+ enum irqchip_irq_state which,
+ bool val);
+extern int irq_chip_get_parent_state(struct irq_data *data,
+ enum irqchip_irq_state which,
+ bool *state);
extern void irq_chip_enable_parent(struct irq_data *data);
extern void irq_chip_disable_parent(struct irq_data *data);
extern void irq_chip_ack_parent(struct irq_data *data);
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index b76703b2c0af..6bb5b22bb0a7 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -1297,6 +1297,50 @@ EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
#endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
+/**
+ * irq_chip_set_parent_state - set the state of a parent interrupt.
+ * @data: Pointer to interrupt specific data
+ * @which: State to be restored (one of IRQCHIP_STATE_*)
+ * @val: Value corresponding to @which
+ *
+ */
+int irq_chip_set_parent_state(struct irq_data *data,
+ enum irqchip_irq_state which,
+ bool val)
+{
+ data = data->parent_data;
+ if (!data)
+ return 0;
+
+ if (data->chip->irq_set_irqchip_state)
+ return data->chip->irq_set_irqchip_state(data, which, val);
+
+ return 0;
+}
+EXPORT_SYMBOL(irq_chip_set_parent_state);
+
+/**
+ * irq_chip_get_parent_state - get the state of a parent interrupt.
+ * @data: Pointer to interrupt specific data
+ * @which: one of IRQCHIP_STATE_* the caller wants to know
+ * @state: a pointer to a boolean where the state is to be stored
+ *
+ */
+int irq_chip_get_parent_state(struct irq_data *data,
+ enum irqchip_irq_state which,
+ bool *state)
+{
+ data = data->parent_data;
+ if (!data)
+ return 0;
+
+ if (data->chip->irq_get_irqchip_state)
+ return data->chip->irq_get_irqchip_state(data, which, state);
+
+ return 0;
+}
+EXPORT_SYMBOL(irq_chip_get_parent_state);
+
/**
* irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
* NULL)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2019-08-29 18:37 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 18:11 [PATCH RFC 00/14] qcom: support wakeup capable GPIOs Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 01/14] irqdomain: add bus token DOMAIN_BUS_WAKEUP Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 02/14] drivers: irqchip: pdc: Do not toggle IRQ_ENABLE during mask/unmask Lina Iyer
2019-09-06 0:39 ` Stephen Boyd
2019-09-11 16:15 ` Lina Iyer
2019-09-20 22:22 ` Stephen Boyd
2019-09-20 22:31 ` Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 03/14] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer
2019-08-30 14:50 ` Marc Zyngier
2019-08-30 15:58 ` Lina Iyer
2019-09-02 8:21 ` Marc Zyngier
2019-09-03 22:51 ` Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 04/14] of: irq: document properties for wakeup interrupt parent Lina Iyer
2019-09-02 13:38 ` Rob Herring
2019-08-29 18:11 ` [PATCH RFC 05/14] dt-bindings/interrupt-controller: pdc: add SPI config register Lina Iyer
2019-09-02 13:38 ` Rob Herring
2019-09-02 13:53 ` Marc Zyngier
2019-09-03 17:07 ` Lina Iyer
2019-09-06 0:03 ` Stephen Boyd
2019-09-13 19:53 ` Lina Iyer
2019-09-17 21:50 ` Lina Iyer
2019-09-20 22:20 ` Stephen Boyd
2019-09-23 6:11 ` Sibi Sankar
[not found] ` <CACRpkdaReFzjb_hcDbQwqMX+whzscLpeZpJPHKqOo+9tANzemA@mail.gmail.com>
2019-09-11 15:19 ` Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 06/14] drivers: irqchip: pdc: additionally set type in SPI config registers Lina Iyer
2019-09-06 0:22 ` Stephen Boyd
2019-08-29 18:11 ` Lina Iyer [this message]
2019-09-06 0:35 ` [PATCH RFC 07/14] genirq: Introduce irq_chip_get/set_parent_state calls Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 08/14] drivers: irqchip: pdc: Add irqchip set/get state calls Lina Iyer
2019-09-06 0:09 ` Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 09/14] drivers: pinctrl: msm: fix use of deprecated gpiolib APIs Lina Iyer
2019-09-06 0:11 ` Stephen Boyd
2019-09-11 10:19 ` Linus Walleij
2019-09-11 16:16 ` Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 10/14] drivers: pinctrl: msm: setup GPIO chip in hierarchy Lina Iyer
2019-08-29 18:12 ` [PATCH RFC 11/14] drivers: pinctrl: sdm845: add PDC wakeup interrupt map for GPIOs Lina Iyer
2019-09-06 0:24 ` Stephen Boyd
2019-08-29 18:12 ` [PATCH RFC 12/14] arm64: dts: qcom: add PDC interrupt controller for SDM845 Lina Iyer
2019-09-09 11:26 ` Maulik Shah
2019-08-29 18:12 ` [PATCH RFC 13/14] arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845 Lina Iyer
2019-08-29 18:12 ` [PATCH RFC 14/14] arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Lina Iyer
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