From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 05/17] clk: tegra30: Support custom CCLK implementation
Date: Fri, 25 Oct 2019 01:14:04 +0300 [thread overview]
Message-ID: <20191024221416.14197-6-digetx@gmail.com> (raw)
In-Reply-To: <20191024221416.14197-1-digetx@gmail.com>
We're going to switch to the generic cpufreq-dt driver on Tegra30 and
thus CCLK intermediate re-parenting will be performed by the clock driver.
There is now special CCLK implementation that supports all CCLK quirks,
this patch makes Tegra30 SoCs to use that implementation.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/clk/tegra/clk-tegra30.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 95b0e4a16dd5..ad545803af42 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -499,6 +499,8 @@ static struct tegra_clk_pll_params pll_x_params __ro_after_init = {
.freq_table = pll_x_freq_table,
.flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_DCCON |
TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
+ .pre_rate_change = tegra_cclk_pre_pllx_rate_change,
+ .post_rate_change = tegra_cclk_post_pllx_rate_change,
};
static struct tegra_clk_pll_params pll_e_params __ro_after_init = {
@@ -932,11 +934,11 @@ static void __init tegra30_super_clk_init(void)
clk_register_clkdev(clk, "pll_p_out4_cclkg", NULL);
/* CCLKG */
- clk = tegra_clk_register_super_mux("cclk_g", cclk_g_parents,
+ clk = tegra_clk_register_super_cclk("cclk_g", cclk_g_parents,
ARRAY_SIZE(cclk_g_parents),
CLK_SET_RATE_PARENT,
clk_base + CCLKG_BURST_POLICY,
- 0, 4, 0, 0, NULL);
+ 0, NULL);
clks[TEGRA30_CLK_CCLK_G] = clk;
/*
--
2.23.0
next prev parent reply other threads:[~2019-10-24 22:17 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-24 22:13 [PATCH v2 00/17] NVIDIA Tegra20 CPUFreq driver major update Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 01/17] clk: tegra: Add custom CCLK implementation Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 02/17] clk: tegra: pll: Add pre/post rate-change hooks Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 03/17] clk: tegra: cclk: Add helpers for handling PLLX rate changes Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 04/17] clk: tegra20: Support custom CCLK implementation Dmitry Osipenko
2019-10-24 22:14 ` Dmitry Osipenko [this message]
2019-10-24 22:14 ` [PATCH v2 06/17] dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30 Dmitry Osipenko
2019-10-29 21:42 ` Rob Herring
2019-10-30 21:05 ` Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 07/17] cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now) Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 08/17] ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 09/17] ARM: dts: tegra20: Add CPU clock Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 10/17] ARM: dts: tegra30: " Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 11/17] ARM: dts: tegra20: Add CPU Operating Performance Points Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 12/17] ARM: dts: tegra30: " Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 13/17] ARM: dts: tegra20: paz00: Set up voltage regulators for DVFS Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 14/17] ARM: dts: tegra20: paz00: Add CPU Operating Performance Points Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 15/17] ARM: dts: tegra20: trimslice: " Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 16/17] ARM: dts: tegra30: cardhu-a04: Set up voltage regulators for DVFS Dmitry Osipenko
2019-10-24 22:14 ` [PATCH v2 17/17] ARM: dts: tegra30: cardhu-a04: Add CPU Operating Performance Points Dmitry Osipenko
2019-11-13 6:52 ` Jon Hunter
2019-11-13 13:57 ` Dmitry Osipenko
2019-11-15 12:52 ` Jon Hunter
2019-11-15 14:55 ` Dmitry Osipenko
2019-11-15 17:31 ` Jon Hunter
2019-11-15 20:35 ` Dmitry Osipenko
2019-11-18 9:52 ` Jon Hunter
2019-10-29 14:09 ` [PATCH v2 00/17] NVIDIA Tegra20 CPUFreq driver major update Thierry Reding
2019-10-29 14:41 ` Dmitry Osipenko
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