From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: Robert Richter <rric@kernel.org>,
soc@kernel.org, Jon Loeliger <jdl@jdl.com>,
Mark Langsdorf <mlangsdo@redhat.com>,
Eric Auger <eric.auger@redhat.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org
Subject: [PATCH 05/13] dt-bindings: clock: Convert Calxeda clock bindings to json-schema
Date: Wed, 26 Feb 2020 18:08:53 +0000 [thread overview]
Message-ID: <20200226180901.89940-6-andre.przywara@arm.com> (raw)
In-Reply-To: <20200226180901.89940-1-andre.przywara@arm.com>
Convert the Calxeda clock bindings to DT schema format using json-schema.
This just covers the actual PLL and divider clock nodes. In the actual
DTs they are somewhat unconnected (no ranges or bus compatible) children
of the sregs node, but for the actual clock bindings this is not
relevant.
One oddity is that the addresses are relative to the parent node,
without that being pronounced using a ranges property.
But this is too late to fix now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
---
.../devicetree/bindings/clock/calxeda.txt | 17 ----
.../devicetree/bindings/clock/calxeda.yaml | 83 +++++++++++++++++++
2 files changed, 83 insertions(+), 17 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/calxeda.txt
create mode 100644 Documentation/devicetree/bindings/clock/calxeda.yaml
diff --git a/Documentation/devicetree/bindings/clock/calxeda.txt b/Documentation/devicetree/bindings/clock/calxeda.txt
deleted file mode 100644
index 0a6ac1bdcda1..000000000000
--- a/Documentation/devicetree/bindings/clock/calxeda.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Device Tree Clock bindings for Calxeda highbank platform
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be one of the following:
- "calxeda,hb-pll-clock" - for a PLL clock
- "calxeda,hb-a9periph-clock" - The A9 peripheral clock divided from the
- A9 clock.
- "calxeda,hb-a9bus-clock" - The A9 bus clock divided from the A9 clock.
- "calxeda,hb-emmc-clock" - Divided clock for MMC/SD controller.
-- reg : shall be the control register offset from SYSREGs base for the clock.
-- clocks : shall be the input parent clock phandle for the clock. This is
- either an oscillator or a pll output.
-- #clock-cells : from common clock binding; shall be set to 0.
diff --git a/Documentation/devicetree/bindings/clock/calxeda.yaml b/Documentation/devicetree/bindings/clock/calxeda.yaml
new file mode 100644
index 000000000000..0ad66af0eb0c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/calxeda.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/calxeda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Device Tree Clock bindings for Calxeda highbank platform
+
+description: |
+ This binding covers the Calxeda SoC internal peripheral and bus clocks
+ as used by peripherals. The clocks live inside the "system register"
+ region of the SoC, so are typically presented as children of an
+ "hb-sregs" node.
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+properties:
+ "#clock-cells":
+ const: 0
+
+ compatible:
+ enum:
+ - calxeda,hb-pll-clock
+ - calxeda,hb-a9periph-clock
+ - calxeda,hb-a9bus-clock
+ - calxeda,hb-emmc-clock
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+
+required:
+ - "#clock-cells"
+ - compatible
+ - clocks
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ sregs@3fffc000 {
+ compatible = "calxeda,hb-sregs";
+ reg = <0x3fffc000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <33333000>;
+ };
+
+ ddrpll: ddrpll {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-pll-clock";
+ clocks = <&osc>;
+ reg = <0x108>;
+ };
+
+ a9pll: a9pll {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-pll-clock";
+ clocks = <&osc>;
+ reg = <0x100>;
+ };
+
+ a9periphclk: a9periphclk {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-a9periph-clock";
+ clocks = <&a9pll>;
+ reg = <0x104>;
+ };
+ };
+ };
+
+...
--
2.17.1
next prev parent reply other threads:[~2020-02-26 18:09 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-26 18:08 [PATCH 00/13] arm: calxeda: update DTS, bindings and MAINTAINERS Andre Przywara
2020-02-26 18:08 ` [PATCH 01/13] arm: dts: calxeda: Basic DT file fixes Andre Przywara
2020-02-26 18:08 ` [PATCH 02/13] arm: dts: calxeda: Provide UART clock Andre Przywara
2020-02-26 18:08 ` [PATCH 03/13] arm: dts: calxeda: Fix interrupt grouping Andre Przywara
2020-02-26 18:08 ` [PATCH 04/13] arm: dts: calxeda: Group port-phys and sgpio-gpio items Andre Przywara
2020-02-26 18:08 ` Andre Przywara [this message]
2020-02-26 18:24 ` [PATCH 05/13] dt-bindings: clock: Convert Calxeda clock bindings to json-schema Maxime Ripard
2020-02-26 18:08 ` [PATCH 06/13] dt-bindings: sata: Convert Calxeda SATA controller " Andre Przywara
2020-02-26 18:25 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 07/13] dt-bindings: net: Convert Calxeda Ethernet binding " Andre Przywara
2020-02-26 18:26 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 08/13] dt-bindings: phy: Convert Calxeda ComboPHY " Andre Przywara
2020-02-26 18:26 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 09/13] dt-bindings: arm: Convert Calxeda L2 cache controller " Andre Przywara
2020-02-26 18:08 ` [PATCH 10/13] dt-bindings: memory-controllers: convert Calxeda DDR " Andre Przywara
2020-02-26 18:27 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 11/13] dt-bindings: ipmi: Convert IPMI-SMIC bindings " Andre Przywara
2020-02-26 18:09 ` [PATCH 12/13] dt-bindings: arm: Add Calxeda system registers json-schema binding Andre Przywara
2020-02-26 21:57 ` Rob Herring
2020-02-27 0:12 ` André Przywara
2020-02-27 14:44 ` Rob Herring
2020-02-26 18:09 ` [PATCH 13/13] MAINTAINERS: Update Calxeda Highbank maintainership Andre Przywara
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