* [PATCH 0/1] Document Ingenic SoCs binding. @ 2020-05-26 17:07 周琰杰 (Zhou Yanjie) 2020-05-26 17:07 ` [PATCH 1/1] dt-bindings: MIPS: " 周琰杰 (Zhou Yanjie) 0 siblings, 1 reply; 5+ messages in thread From: 周琰杰 (Zhou Yanjie) @ 2020-05-26 17:07 UTC (permalink / raw) To: linux-mips Cc: linux-kernel, devicetree, robh+dt, tsbogend, hns, paul, dongsheng.qiu, aric.pzqi, sernia.zhou, zhenwenjin, paul Document the available properties for the SoC root node and the CPU nodes of the devicetree for the Ingenic XBurst SoCs. 周琰杰 (Zhou Yanjie) (1): dt-bindings: MIPS: Document Ingenic SoCs binding. .../bindings/mips/ingenic/ingenic,cpu.yaml | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml -- 2.11.0 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding. 2020-05-26 17:07 [PATCH 0/1] Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie) @ 2020-05-26 17:07 ` 周琰杰 (Zhou Yanjie) 2020-05-26 19:10 ` Paul Cercueil 0 siblings, 1 reply; 5+ messages in thread From: 周琰杰 (Zhou Yanjie) @ 2020-05-26 17:07 UTC (permalink / raw) To: linux-mips Cc: linux-kernel, devicetree, robh+dt, tsbogend, hns, paul, dongsheng.qiu, aric.pzqi, sernia.zhou, zhenwenjin, paul Document the available properties for the SoC root node and the CPU nodes of the devicetree for the Ingenic XBurst SoCs. Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Tested-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> --- .../bindings/mips/ingenic/ingenic,cpu.yaml | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml new file mode 100644 index 000000000000..afb02071a756 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for Ingenic XBurst family CPUs + +maintainers: + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> + +description: + Ingenic XBurst family CPUs shall have the following properties. + +properties: + compatible: + oneOf: + + - description: Ingenic XBurst®1 CPU Cores + items: + enum: + - ingenic,xburst-mxu1.0 + - ingenic,xburst-fpu1.0-mxu1.1 + - ingenic,xburst-fpu2.0-mxu2.0 + + - description: Ingenic XBurst®2 CPU Cores + items: + enum: + - ingenic,xburst2-fpu2.1-mxu2.1-smt + + reg: + maxItems: 1 + +required: + - device_type + - compatible + - reg + +examples: + - | + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; + reg = <1>; + }; + }; +... -- 2.11.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding. 2020-05-26 17:07 ` [PATCH 1/1] dt-bindings: MIPS: " 周琰杰 (Zhou Yanjie) @ 2020-05-26 19:10 ` Paul Cercueil 2020-05-27 6:10 ` Zhou Yanjie 2020-05-29 17:39 ` Rob Herring 0 siblings, 2 replies; 5+ messages in thread From: Paul Cercueil @ 2020-05-26 19:10 UTC (permalink / raw) To: 周琰杰 Cc: linux-mips, linux-kernel, devicetree, robh+dt, tsbogend, hns, paul, dongsheng.qiu, aric.pzqi, sernia.zhou, zhenwenjin Hi Zhou, Le mer. 27 mai 2020 à 1:07, 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> a écrit : > Document the available properties for the SoC root node and the > CPU nodes of the devicetree for the Ingenic XBurst SoCs. > > Tested-by: H. Nikolaus Schaller <hns@goldelico.com> > Tested-by: Paul Boddie <paul@boddie.org.uk> > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > --- > .../bindings/mips/ingenic/ingenic,cpu.yaml | 57 > ++++++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > > diff --git > a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > new file mode 100644 > index 000000000000..afb02071a756 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Bindings for Ingenic XBurst family CPUs > + > +maintainers: > + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > + > +description: > + Ingenic XBurst family CPUs shall have the following properties. > + > +properties: > + compatible: > + oneOf: > + > + - description: Ingenic XBurst®1 CPU Cores > + items: Strip the 'items', put the enum directly. > + enum: > + - ingenic,xburst-mxu1.0 > + - ingenic,xburst-fpu1.0-mxu1.1 > + - ingenic,xburst-fpu2.0-mxu2.0 > + > + - description: Ingenic XBurst®2 CPU Cores > + items: Same here. > + enum: > + - ingenic,xburst2-fpu2.1-mxu2.1-smt > + > + reg: > + maxItems: 1 > + > +required: > + - device_type > + - compatible > + - reg device_type is not in the list of your properties. Also, I think you need a clock in there. -Paul > + > +examples: > + - | > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; > + reg = <0>; > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; > + reg = <1>; > + }; > + }; > +... > -- > 2.11.0 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding. 2020-05-26 19:10 ` Paul Cercueil @ 2020-05-27 6:10 ` Zhou Yanjie 2020-05-29 17:39 ` Rob Herring 1 sibling, 0 replies; 5+ messages in thread From: Zhou Yanjie @ 2020-05-27 6:10 UTC (permalink / raw) To: Paul Cercueil Cc: linux-mips, linux-kernel, devicetree, robh+dt, tsbogend, hns, paul, dongsheng.qiu, aric.pzqi, sernia.zhou, zhenwenjin Hi Paul, 在 2020/5/27 上午3:10, Paul Cercueil 写道: > Hi Zhou, > > Le mer. 27 mai 2020 à 1:07, 周琰杰 (Zhou Yanjie) > <zhouyanjie@wanyeetech.com> a écrit : >> Document the available properties for the SoC root node and the >> CPU nodes of the devicetree for the Ingenic XBurst SoCs. >> >> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> >> Tested-by: Paul Boddie <paul@boddie.org.uk> >> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> >> --- >> .../bindings/mips/ingenic/ingenic,cpu.yaml | 57 >> ++++++++++++++++++++++ >> 1 file changed, 57 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml >> >> diff --git >> a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml >> b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml >> new file mode 100644 >> index 000000000000..afb02071a756 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml >> @@ -0,0 +1,57 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Bindings for Ingenic XBurst family CPUs >> + >> +maintainers: >> + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> >> + >> +description: >> + Ingenic XBurst family CPUs shall have the following properties. >> + >> +properties: >> + compatible: >> + oneOf: >> + >> + - description: Ingenic XBurst®1 CPU Cores >> + items: > > Strip the 'items', put the enum directly. > Sure, I'll drop it in the next version. >> + enum: >> + - ingenic,xburst-mxu1.0 >> + - ingenic,xburst-fpu1.0-mxu1.1 >> + - ingenic,xburst-fpu2.0-mxu2.0 >> + >> + - description: Ingenic XBurst®2 CPU Cores >> + items: > > Same here. > Sure. >> + enum: >> + - ingenic,xburst2-fpu2.1-mxu2.1-smt >> + >> + reg: >> + maxItems: 1 >> + >> +required: >> + - device_type >> + - compatible >> + - reg > > device_type is not in the list of your properties. > > Also, I think you need a clock in there. > Sure, I will add it. Thanks and best regards! > -Paul > >> + >> +examples: >> + - | >> + cpus { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + cpu0: cpu@0 { >> + device_type = "cpu"; >> + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; >> + reg = <0>; >> + }; >> + >> + cpu1: cpu@1 { >> + device_type = "cpu"; >> + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; >> + reg = <1>; >> + }; >> + }; >> +... >> -- >> 2.11.0 >> > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding. 2020-05-26 19:10 ` Paul Cercueil 2020-05-27 6:10 ` Zhou Yanjie @ 2020-05-29 17:39 ` Rob Herring 1 sibling, 0 replies; 5+ messages in thread From: Rob Herring @ 2020-05-29 17:39 UTC (permalink / raw) To: Paul Cercueil Cc: 周琰杰, linux-mips, linux-kernel, devicetree, tsbogend, hns, paul, dongsheng.qiu, aric.pzqi, sernia.zhou, zhenwenjin On Tue, May 26, 2020 at 09:10:29PM +0200, Paul Cercueil wrote: > Hi Zhou, > > Le mer. 27 mai 2020 à 1:07, 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > a écrit : > > Document the available properties for the SoC root node and the > > CPU nodes of the devicetree for the Ingenic XBurst SoCs. > > > > Tested-by: H. Nikolaus Schaller <hns@goldelico.com> > > Tested-by: Paul Boddie <paul@boddie.org.uk> > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > --- > > .../bindings/mips/ingenic/ingenic,cpu.yaml | 57 > > ++++++++++++++++++++++ > > 1 file changed, 57 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > > b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > > new file mode 100644 > > index 000000000000..afb02071a756 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > > @@ -0,0 +1,57 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Bindings for Ingenic XBurst family CPUs > > + > > +maintainers: > > + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > + > > +description: > > + Ingenic XBurst family CPUs shall have the following properties. > > + > > +properties: > > + compatible: > > + oneOf: > > + > > + - description: Ingenic XBurst®1 CPU Cores > > + items: > > Strip the 'items', put the enum directly. > > > + enum: > > + - ingenic,xburst-mxu1.0 > > + - ingenic,xburst-fpu1.0-mxu1.1 > > + - ingenic,xburst-fpu2.0-mxu2.0 > > + > > + - description: Ingenic XBurst®2 CPU Cores > > + items: > > Same here. > > > + enum: > > + - ingenic,xburst2-fpu2.1-mxu2.1-smt > > + > > + reg: > > + maxItems: 1 > > + > > +required: > > + - device_type > > + - compatible > > + - reg > > device_type is not in the list of your properties. It doesn't have to be. There's already a schema for it in dt-schema. It's not always required there, so requiring here is fine. It's an oddity of json-schema, but what's listed in required doesn't have to be in 'properties'. Rob ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-05-29 17:39 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-05-26 17:07 [PATCH 0/1] Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie) 2020-05-26 17:07 ` [PATCH 1/1] dt-bindings: MIPS: " 周琰杰 (Zhou Yanjie) 2020-05-26 19:10 ` Paul Cercueil 2020-05-27 6:10 ` Zhou Yanjie 2020-05-29 17:39 ` Rob Herring
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