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From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>,
	hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Jiri Slaby <jslaby@suse.cz>,
	Dan Williams <dan.j.williams@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Juergen Gross <jgross@suse.com>,
	Kees Cook <keescook@chromium.org>,
	David Rientjes <rientjes@google.com>,
	Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Mike Stunes <mstunes@vmware.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Martin Radev <martin.b.radev@gmail.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Subject: [PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler
Date: Mon, 24 Aug 2020 10:54:43 +0200	[thread overview]
Message-ID: <20200824085511.7553-49-joro@8bytes.org> (raw)
In-Reply-To: <20200824085511.7553-1-joro@8bytes.org>

From: Joerg Roedel <jroedel@suse.de>

The #VC handler needs special entry code because:

	1. It runs on an IST stack

	2. It needs to be able to handle nested #VC exceptions

To make this work the entry code is implemented to pretend it doesn't
use an IST stack. When entered from user-mode or early SYSCALL entry
path it switches to the task stack, if entered from kernel-mode it
tries to switch back to the previous stack in the IRET frame.

The stack found in the IRET frame is validated first, and if it is not
safe to use it for the #VC handler, the code will switch to a
fall-back stack (the #VC2 IST stack). From there it can cause nested
exceptions again.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Link: https://lore.kernel.org/r/20200724160336.5435-48-joro@8bytes.org
---
 arch/x86/entry/entry_64.S       | 78 +++++++++++++++++++++++++++++++++
 arch/x86/include/asm/idtentry.h | 44 +++++++++++++++++++
 arch/x86/include/asm/proto.h    |  1 +
 arch/x86/include/asm/traps.h    |  1 +
 arch/x86/kernel/traps.c         | 51 +++++++++++++++++++++
 5 files changed, 175 insertions(+)

diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 26fc9b42fadc..cc054568ad3f 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -101,6 +101,8 @@ SYM_CODE_START(entry_SYSCALL_64)
 	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
 	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
 
+SYM_INNER_LABEL(entry_SYSCALL_64_safe_stack, SYM_L_GLOBAL)
+
 	/* Construct struct pt_regs on stack */
 	pushq	$__USER_DS				/* pt_regs->ss */
 	pushq	PER_CPU_VAR(cpu_tss_rw + TSS_sp2)	/* pt_regs->sp */
@@ -446,6 +448,82 @@ _ASM_NOKPROBE(\asmsym)
 SYM_CODE_END(\asmsym)
 .endm
 
+/**
+ * idtentry_vc - Macro to generate entry stub for #VC
+ * @vector:		Vector number
+ * @asmsym:		ASM symbol for the entry point
+ * @cfunc:		C function to be called
+ *
+ * The macro emits code to set up the kernel context for #VC. The #VC handler
+ * runs on an IST stack and needs to be able to cause nested #VC exceptions.
+ *
+ * To make this work the #VC entry code tries its best to pretend it doesn't use
+ * an IST stack by switching to the task stack if coming from user-space (which
+ * includes early SYSCALL entry path) or back to the stack in the IRET frame if
+ * entered from kernel-mode.
+ *
+ * If entered from kernel-mode the return stack is validated first, and if it is
+ * not safe to use (e.g. because it points to the entry stack) the #VC handler
+ * will switch to a fall-back stack (VC2) and call a special handler function.
+ *
+ * The macro is only used for one vector, but it is planned to extend it in the
+ * future for the #HV exception.
+ */
+.macro idtentry_vc vector asmsym cfunc
+SYM_CODE_START(\asmsym)
+	UNWIND_HINT_IRET_REGS
+	ASM_CLAC
+
+	/*
+	 * If the entry is from userspace, switch stacks and treat it as
+	 * a normal entry.
+	 */
+	testb	$3, CS-ORIG_RAX(%rsp)
+	jnz	.Lfrom_usermode_switch_stack_\@
+
+	/*
+	 * paranoid_entry returns SWAPGS flag for paranoid_exit in EBX.
+	 * EBX == 0 -> SWAPGS, EBX == 1 -> no SWAPGS
+	 */
+	call	paranoid_entry
+
+	UNWIND_HINT_REGS
+
+	/*
+	 * Switch off the IST stack to make it free for nested exceptions. The
+	 * vc_switch_off_ist() function will switch back to the interrupted
+	 * stack if it is safe to do so. If not it switches to the VC fall-back
+	 * stack.
+	 */
+	movq	%rsp, %rdi		/* pt_regs pointer */
+	call	vc_switch_off_ist
+	movq	%rax, %rsp		/* Switch to new stack */
+
+	UNWIND_HINT_REGS
+
+	/* Update pt_regs */
+	movq	ORIG_RAX(%rsp), %rsi	/* get error code into 2nd argument*/
+	movq	$-1, ORIG_RAX(%rsp)	/* no syscall to restart */
+
+	movq	%rsp, %rdi		/* pt_regs pointer */
+
+	call	\cfunc
+
+	/*
+	 * No need to switch back to the IST stack. The current stack is either
+	 * identical to the stack in the IRET frame or the VC fall-back stack,
+	 * so it is definitly mapped even with PTI enabled.
+	 */
+	jmp	paranoid_exit
+
+	/* Switch to the regular task stack */
+.Lfrom_usermode_switch_stack_\@:
+	idtentry_body safe_stack_\cfunc, has_error_code=1
+
+_ASM_NOKPROBE(\asmsym)
+SYM_CODE_END(\asmsym)
+.endm
+
 /*
  * Double fault entry. Straight paranoid. No checks from which context
  * this comes because for the espfix induced #DF this would do the wrong
diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index 337dcfd45472..5ce67113a761 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -308,6 +308,18 @@ static __always_inline void __##func(struct pt_regs *regs)
 	DECLARE_IDTENTRY_RAW(vector, func);				\
 	__visible void noist_##func(struct pt_regs *regs)
 
+/**
+ * DECLARE_IDTENTRY_VC - Declare functions for the VC entry point
+ * @vector:	Vector number (ignored for C)
+ * @func:	Function name of the entry point
+ *
+ * Maps to DECLARE_IDTENTRY_RAW_ERRORCODE, but declares also the
+ * safe_stack C handler.
+ */
+#define DECLARE_IDTENTRY_VC(vector, func)				\
+	DECLARE_IDTENTRY_RAW_ERRORCODE(vector, func);			\
+	__visible noinstr void safe_stack_##func(struct pt_regs *regs, unsigned long error_code)
+
 /**
  * DEFINE_IDTENTRY_IST - Emit code for IST entry points
  * @func:	Function name of the entry point
@@ -347,6 +359,35 @@ static __always_inline void __##func(struct pt_regs *regs)
 #define DEFINE_IDTENTRY_DF(func)					\
 	DEFINE_IDTENTRY_RAW_ERRORCODE(func)
 
+/**
+ * DEFINE_IDTENTRY_VC_SAFE_STACK - Emit code for VMM communication handler
+				   which runs on a safe stack.
+ * @func:	Function name of the entry point
+ *
+ * Maps to DEFINE_IDTENTRY_RAW_ERRORCODE
+ */
+#define DEFINE_IDTENTRY_VC_SAFE_STACK(func)				\
+	DEFINE_IDTENTRY_RAW_ERRORCODE(safe_stack_##func)
+
+/**
+ * DEFINE_IDTENTRY_VC_IST - Emit code for VMM communication handler
+			    which runs on the VC fall-back stack
+ * @func:	Function name of the entry point
+ *
+ * Maps to DEFINE_IDTENTRY_RAW_ERRORCODE
+ */
+#define DEFINE_IDTENTRY_VC_IST(func)				\
+	DEFINE_IDTENTRY_RAW_ERRORCODE(ist_##func)
+
+/**
+ * DEFINE_IDTENTRY_VC - Emit code for VMM communication handler
+ * @func:	Function name of the entry point
+ *
+ * Maps to DEFINE_IDTENTRY_RAW_ERRORCODE
+ */
+#define DEFINE_IDTENTRY_VC(func)					\
+	DEFINE_IDTENTRY_RAW_ERRORCODE(func)
+
 #else	/* CONFIG_X86_64 */
 
 /**
@@ -433,6 +474,9 @@ __visible noinstr void func(struct pt_regs *regs,			\
 # define DECLARE_IDTENTRY_XENCB(vector, func)				\
 	DECLARE_IDTENTRY(vector, func)
 
+# define DECLARE_IDTENTRY_VC(vector, func)				\
+	idtentry_vc vector asm_##func func
+
 #else
 # define DECLARE_IDTENTRY_MCE(vector, func)				\
 	DECLARE_IDTENTRY(vector, func)
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h
index 28996fe19301..2c35f1c01a2d 100644
--- a/arch/x86/include/asm/proto.h
+++ b/arch/x86/include/asm/proto.h
@@ -10,6 +10,7 @@ void syscall_init(void);
 
 #ifdef CONFIG_X86_64
 void entry_SYSCALL_64(void);
+void entry_SYSCALL_64_safe_stack(void);
 long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2);
 #endif
 
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 6a308355ea29..1b86bb3abc56 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -15,6 +15,7 @@ asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs);
 asmlinkage __visible notrace
 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s);
 void __init trap_init(void);
+asmlinkage __visible noinstr struct pt_regs *vc_switch_off_ist(struct pt_regs *eregs);
 #endif
 
 #ifdef CONFIG_X86_F00F_BUG
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 030d882eaad1..e592c10d25f8 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -43,6 +43,7 @@
 #include <asm/stacktrace.h>
 #include <asm/processor.h>
 #include <asm/debugreg.h>
+#include <asm/realmode.h>
 #include <asm/text-patching.h>
 #include <asm/ftrace.h>
 #include <asm/traps.h>
@@ -674,6 +675,56 @@ asmlinkage __visible noinstr struct pt_regs *sync_regs(struct pt_regs *eregs)
 	return regs;
 }
 
+#ifdef CONFIG_AMD_MEM_ENCRYPT
+asmlinkage __visible noinstr struct pt_regs *vc_switch_off_ist(struct pt_regs *eregs)
+{
+	unsigned long sp, *stack;
+	struct stack_info info;
+	struct pt_regs *regs;
+
+	/*
+	 * In the SYSCALL entry path the RSP value comes from user-space - don't
+	 * trust it and switch to the current kernel stack
+	 */
+	if (eregs->ip >= (unsigned long)entry_SYSCALL_64 &&
+	    eregs->ip <  (unsigned long)entry_SYSCALL_64_safe_stack) {
+		sp = this_cpu_read(cpu_current_top_of_stack);
+		goto sync;
+	}
+
+	/*
+	 * From here on the the RSP value is trusted - more RSP sanity checks
+	 * need to happen above.
+	 *
+	 * Check whether entry happened from a safe stack.
+	 */
+	sp    = eregs->sp;
+	stack = (unsigned long *)sp;
+	get_stack_info_noinstr(stack, current, &info);
+
+	/*
+	 * Don't sync to entry stack or other unknown stacks - use the fall-back
+	 * stack instead.
+	 */
+	if (info.type == STACK_TYPE_UNKNOWN || info.type == STACK_TYPE_ENTRY ||
+	    info.type >= STACK_TYPE_EXCEPTION_LAST)
+		sp = __this_cpu_ist_top_va(VC2);
+
+sync:
+	/*
+	 * Found a safe stack - switch to it as if the entry didn't happen via
+	 * IST stack. The code below only copies pt_regs, the real switch happens
+	 * in assembly code.
+	 */
+	sp = ALIGN_DOWN(sp, 8) - sizeof(*regs);
+
+	regs = (struct pt_regs *)sp;
+	*regs = *eregs;
+
+	return regs;
+}
+#endif
+
 struct bad_iret_stack {
 	void *error_entry_ret;
 	struct pt_regs regs;
-- 
2.28.0


  parent reply	other threads:[~2020-08-24  9:10 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-24  8:53 [PATCH v6 00/76] x86: SEV-ES Guest Support Joerg Roedel
2020-08-24  8:53 ` [PATCH v6 01/76] KVM: SVM: nested: Don't allocate VMCB structures on stack Joerg Roedel
2020-08-24  8:53 ` [PATCH v6 02/76] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-08-24 10:44   ` Borislav Petkov
2020-08-25  9:22     ` Joerg Roedel
2020-08-25 11:04       ` Borislav Petkov
2020-08-27 16:01         ` Arvind Sankar
2020-08-28 11:54           ` Joerg Roedel
2020-08-24  8:53 ` [PATCH v6 03/76] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-08-24  8:53 ` [PATCH v6 04/76] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 05/76] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 06/76] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 07/76] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 08/76] x86/umip: Factor out instruction fetch Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 09/76] x86/umip: Factor out instruction decoding Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 10/76] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 11/76] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 12/76] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 13/76] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-08-27 15:26   ` Arvind Sankar
2020-08-28 12:12     ` Joerg Roedel
2020-08-28 15:09       ` Arvind Sankar
2020-08-24  8:54 ` [PATCH v6 14/76] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 15/76] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 16/76] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 17/76] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 18/76] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 19/76] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 20/76] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-08-27  9:36   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 21/76] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 22/76] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 23/76] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 24/76] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 25/76] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 26/76] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 27/76] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-08-27 22:48   ` Arvind Sankar
2020-08-28 12:33     ` Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 28/76] x86/idt: Move IDT to data segment Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 29/76] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-08-28 15:16   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 30/76] x86/head/64: Install startup GDT Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 31/76] x86/head/64: Setup MSR_GS_BASE before calling into C code Joerg Roedel
2020-08-28 18:13   ` Borislav Petkov
2020-09-01 12:09     ` Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 32/76] x86/head/64: Load GDT after switch to virtual addresses Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 33/76] x86/head/64: Load segment registers earlier Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 34/76] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 35/76] x86/head/64: Make fixup_pointer() static inline Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 36/76] x86/head/64: Load IDT earlier Joerg Roedel
2020-08-29 10:24   ` Borislav Petkov
2020-09-01 12:13     ` Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 37/76] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 38/76] x86/head/64: Set CR4.FSGSBASE early Joerg Roedel
2020-08-29 15:55   ` Borislav Petkov
2020-08-31  8:58     ` Joerg Roedel
2020-08-31  9:26       ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 39/76] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-08-29 16:25   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 40/76] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 41/76] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 42/76] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-08-31  9:45   ` Borislav Petkov
2020-09-01 12:59     ` Joerg Roedel
2020-09-01 13:35       ` Borislav Petkov
2021-09-04  9:39   ` Lai Jiangshan
2021-09-06  5:07     ` Juergen Gross
2020-08-24  8:54 ` [PATCH v6 43/76] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 44/76] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 45/76] x86/sev-es: Allocate and Map IST stack for #VC handler Joerg Roedel
2020-08-31 10:27   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 46/76] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Joerg Roedel
2020-08-31 11:05   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 47/76] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel
2020-08-31 11:11   ` Borislav Petkov
2020-08-24  8:54 ` Joerg Roedel [this message]
2020-08-31 11:30   ` [PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler Borislav Petkov
2020-09-01 13:29     ` Joerg Roedel
2020-08-31 17:30   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 49/76] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 50/76] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 51/76] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 52/76] x86/sev-es: Handle MMIO events Joerg Roedel
2020-08-31 15:47   ` Borislav Petkov
2020-08-24  8:54 ` [PATCH v6 53/76] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 54/76] x86/sev-es: Handle MSR events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 55/76] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 56/76] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 57/76] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 58/76] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 59/76] x86/sev-es: Handle INVD Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 60/76] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 61/76] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 62/76] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 63/76] x86/sev-es: Handle #AC Events Joerg Roedel
2020-08-24  8:54 ` [PATCH v6 64/76] x86/sev-es: Handle #DB Events Joerg Roedel
2020-08-31 16:19   ` Borislav Petkov
2020-08-24  8:55 ` [PATCH v6 65/76] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 66/76] x86/kvm: Add KVM " Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 67/76] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 68/76] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 69/76] x86/realmode: Setup AP jump table Joerg Roedel
2020-08-31 17:09   ` Borislav Petkov
2020-09-01 13:55     ` Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 70/76] x86/smpboot: Setup TSS for starting AP Joerg Roedel
2020-08-31 17:25   ` Borislav Petkov
2020-08-24  8:55 ` [PATCH v6 71/76] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 72/76] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-08-31 17:29   ` Borislav Petkov
2020-08-24  8:55 ` [PATCH v6 73/76] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 74/76] x86/sev-es: Handle NMI State Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 75/76] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-08-24  8:55 ` [PATCH v6 76/76] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel
2020-08-25  0:21 ` [PATCH v6 00/76] x86: SEV-ES Guest Support Mike Stunes
2020-08-25  6:24   ` Joerg Roedel

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